| Project Name | Description | Type | Bids | Avg (USD) | Skill Required | Started | Ends | |
|---|---|---|---|---|---|---|---|---|
| Hello! I have a FPGA board modell: DIGILENT NEXYS 2. I need a programmer in Verilog or VHDL, to make a software for this board witch solves non-linear equations... I will specify the bidders the non-linear ... | Fixed | 26 | $133 | C Programming, Data Processing, Electronics, Engineering, Verilog / VHDL | May 20, 2009 | - | ||
| Given a RTL description of a hardware design in verilog or VHDL. I need to build a tool which can generate a CDFG (control data flow graph) and also the ability to graphically view the CDFG | Fixed | 4 | $1563 | C Programming, C++ Programming, Python, Verilog / VHDL | Mar 4, 2012 | - | ||
| ... board Altera cyclone 2 DE1 to design a voice recorder. Design the project using VHDL.The design should be able to record a minimum of 1 minute of ... or an external speaker. In need of the VHDL programme codes and a Report on the analysis ... | Fixed | 4 | $613 | Verilog / VHDL | Sep 28, 2011 | - | ||
| ... - traffic_vance (dot) com. I need to be able to log into their user-panel and search keywords and urls to see what the current bids are, how many people are bidding on them, etc. this info should be exportable to csv, xls, or html. I also need to ... | Fixed | 4 | $194 | AJAX, Javascript, PHP | Jun 18, 2009 | - | ||
| No Bids project. Private for Amit. | Fixed | 1 | $30 | Copywriting, Data Entry, Data Processing, Internet Marketing, Proofreading | Oct 5, 2010 | - | ||
| ... . Translators/Interpreters/Merchants bid $ on a project, THEN lowest unique bidder = winner. ... can choose 1 of lowest ten bids. PROJECT DESIGN + IMPROVEMENTS: * Front page: ... tender and contact us to discuss project in further detail. We hope to ... | Fixed | 7 | PHP, XML | Jun 5, 2008 | - | |||
| Hi there, Heres are real simple project. In our Joomla virtuemart shop, at the ... . Once again, this is a very easy project for those that are skilled enough :-) ... 1 or 2 days Thanks No high crazy bids, project is pretty simple. Budget is between ... | Fixed | 0 | Javascript, PHP | Aug 16, 2007 | - | |||
| I need to make a website with the same ordering option of this: http://www.rapidprototype.com.au/jewellery.html (click on quote to preview). Only serious bids, project must be ready within 45 days. Payment by PayPal only. | Fixed | 27 | $543 | Graphic Design, HTML, PHP, Website Design | Oct 25, 2011 | - | ||
| I have four algorithms that needs to be converted from the actual programing language C into VHDL or Verilog. Also I need the VHDL/Verilog code, the Simulation and a simple documentation. For more details, post a PM. | Fixed | 8 | $207 | C Programming, Verilog / VHDL | Jun 18, 2009 | - | ||
| ... and model the E12MUX in Verilog. The FPGA being targeted should ... E12MUX 2. Model the design using verilog HDL, carry out the functional ... an efficient test bench in Verilog 2.) The test bench should ... . Now I do have the VHDL code for the E1 framer ... | Fixed | 9 | $256 | Electronics, Microcontroller, Verilog / VHDL | Sep 18, 2009 | - | ||
| ... given. You just have to code verilog file. I wil tell you details ... good history/ratings. THIS is NOT VHDL CODING. Only, people with experience in verilog should apply. PLease tell me ... details about project. If you can send me any of verilog file ... | Fixed | 9 | $64 | Electrical Engineering, Electronics, Verilog / VHDL | Nov 22, 2011 | - | ||
| I need to translate 14 VHDL files (total ~3000 lines) to Verilog. | Fixed | 23 | $130 | Electrical Engineering, Verilog / VHDL | Mar 1, 2012 | - | ||
| I need a expert in VHDL/Verilog behavioral. If you are please PM me, for more info on the project. Thank you | Fixed | 0 | Mar 15, 2007 | - | ||||
| Convert a Verilog source code to VHDL | Fixed | 4 | Electrical Engineering, Electronics, Matlab & Mathematica | Jan 2, 2011 | - | |||
| We require porting of a design which uses 3 Cyclone FPGAs into one Cyclone3 FPGA, source code for the firmware is available for the coder, knowledge of VHDL/Verilog along with hardware level cyclone3 knowledge required. | Fixed | 22 | C Programming, Electronics, Wireless | Oct 30, 2008 | - | |||
| VHDL project Includes coding, initial report and final report. The board being used is: Altera® DE1 Development and Education board http://university.altera.com/materials/boards/de1/?hdl=Verilog&board=DE2&quartusII=9.0 | Fixed | 8 | $119 | Verilog / VHDL | May 7, 2010 | - | ||
| ... only Gbit or only 100Mbit, and the project must connect successfully at either speed. ... it could just be a stand-alone project. Basically, for anyone that already has ... your test projects. The project MUST be in VHDL, sorry Verilog not accepted under ... | Fixed | 6 | $792 | Verilog / VHDL | Sep 30, 2011 | - | ||
| Fixed | Dec 26, 2010 | - | ||||||
| Project: Ethernet Hub/Repeater on FPGA Ethernet: 10/100 Base, Opencore IP ... 2 IP Core + Host Languages required: HDLs (Verilog, VHDL), HVLs (Tcl, Perl), C Required ... work is successful, I have more project to work together. - Compensation is based ... | Fixed | 10 | $2840 | Electrical Engineering, Verilog / VHDL | Sep 26, 2010 | - | ||
| Hi, I have two project requirements. NO COPIES. I need some ... 300-350 lines in VERILOG (strictly, no VHDL please). Your ideas ... decide the cost of the project depending on the idea it's based on. Deadlines: Project 1: 5th - 6th May Project 2: 12th ... | Fixed | 12 | $3250 | Verilog / VHDL | Apr 22, 2012 | - | ||
| Hi, I have two project requirements. NO COPIES. I need some ... 300-350 lines in VERILOG (strictly, no VHDL please). Your ideas ... decide the cost of the project depending on the idea it's based on. Deadlines: Project 1: 5th - 6th May Project 2: 12th ... | Fixed | 4 | $155 | Verilog / VHDL | Apr 30, 2012 | - | ||
| Fixed | Sep 16, 2007 | - | ||||||
| Design PCI devices, with following specifications: 1. Design PCI arbitration logic for initiator 1 and initiator 2 on PCI Bus 2. Design the initiators and targets that can perform following cycles 3. Design all the signals required 4. Initiator1 and ... | Fixed | 3 | $85 | Engineering | Oct 17, 2008 | - | ||
| ... evaluation board with a Cyclone 4 FPGA processor (EP4CE115F29C7). I need a HDL design either written in Verilog or VHDL that implements a SPI core. I want to transfer data between the FPGA evaluation board and ... | Fixed | 13 | $196 | Electronics, Embedded Software, Microcontroller | May 23, 2011 | - | ||
| Hi, I need a state machine that controls the Wiznet chip W5300 for UDP or Ethernet communication. The scope is to send data on ethernet at (at least) 10 Mbit/s. The state machine should be in Verilog (not VHDL) targeting an FPGA. Further datails in PM. | Fixed | 6 | $107 | Electronics, Embedded Software, Engineering, Microcontroller, Verilog / VHDL | Nov 30, 2011 | - | ||
| Its a digital clock using VHDL all data included in file Its basically works on the ... file: digital_clk.vhd test bench ///////////////////////////////// Its a digital clock using VHDL all data included in file Its basically works on the ... | Fixed | 12 | $53 | Electronics, Verilog / VHDL | Dec 20, 2011 | - | ||
| ... Installation Shopping Carts System Admin. Training Verilog / VHDL Web Promotion Windows XML Accounting ASP C/C++ Copywriting Delphi Excel ... Java JSP Linux Matlab/Mathematica Photoshop Project Management Ruby/Ruby on Rails SEM ... | Fixed | 16 | AJAX, Computer Security, iPhone, Twitter, Wireless | May 28, 2009 | - | |||
| Hi, I need a person who can do a simple verilog job for me. More details will be provided in PM. If you previous work sample on Verilog then it would be plus. Would be waiting for your bids. Thanks | Fixed | 9 | $68 | Electrical Engineering, Electronics, Matlab & Mathematica, Microcontroller, Verilog / VHDL | Nov 18, 2011 | - | ||
| Hi, I need a person who can do a verilog job for me. More details will be provided in PM. If you previous work sample on Verilog then it would be plus. Would be waiting for your bids. Thanks | Fixed | 13 | $113 | Electrical Engineering, Electronics, Matlab & Mathematica, Microcontroller, Verilog / VHDL | Nov 21, 2011 | - | ||
| A verilog code for 32bit single precision floating point addition unit. The detail will be provided. | Fixed | 16 | $136 | Software Architecture, Verilog / VHDL | May 5, 2012 | - | ||
| ... (architecture design and coding in VHDL). I have no prior experience ... given a short note on my project below. I have to design ... in VHDL. Can you please help me in my project. I ... processor design and coding in VHDL that implements the mentioned concept ... | Fixed | 7 | $271 | Electrical Engineering, Electronics, Engineering, Verilog / VHDL | Jul 27, 2010 | - | ||
| ... (verification should not fail). More than verilog design, main work is test bench ... will send you exact details about project in message. You should know ... architecture, pipelining. Thanks Actually very simple project. 90% work is done. Budget no ... | Fixed | 3 | $43 | Electrical Engineering, Electronics, Verilog / VHDL | Apr 21, 2012 | - | ||
| Hi, I need to develop HDL editor with a) Verilog/VHDL syntax correction, b) with dynamic hints for good coding guidelines (as and when designer writes code, gets hints by editor for good coding rules ... | Fixed | 5 | $190 | Building Architecture, C Programming, Linux | Jul 21, 2009 | - | ||
| ... i have almost 3 days left. for some one who knows VHDL or assembly language doest take more than a day.I have attached the project question and i can provide you the link for VHDL download if interested in doing that. I have already done ... | Fixed | 3 | $42 | Electronics, Software Architecture | May 2, 2011 | - | ||
| ... . This is a fairly easy project for someone with expertise in Verilog. The deliverables are as follows -Verilog code to ... can be used are 1.http://opencores.org/project,ethernet_tri_mode 2.http://opencores.org/project,ethmac 3. ... | Fixed | 3 | $383 | Verilog / VHDL | Oct 20, 2011 | - | ||
| Hello Do you know Verilog then proceed: "I want a face recognition system ... . You can use any algorithm for this project. My FPGA model is DEO (http://www. ... &No=364). Moreover, you have to use Verilog programming language. My camera module is D5M ( ... | Fixed | 1 | $4 | Face Recognition | May 25, 2012 | 4d 4h | ||
| Verilog design and testing skills | Fixed | 16 | $1164 | Algorithm, C++ Programming, Testing / QA, Verilog / VHDL | Sep 2, 2010 | - | ||
| ... simulate your design using ISE or another VHDL simulator to prove the correctness of your design. Prepare a short report with the VHDL codes and the simulation results. IT ... A VERY EASY JOB FOR WHO KNOWS VHDL. It's one of my lab project. Details of ... | Fixed | 7 | $66 | Electrical Engineering, Electronics, Embedded Software, Microcontroller, Verilog / VHDL | Dec 1, 2010 | - | ||
| Fixed | Jul 11, 2011 | - | ||||||
| ... do the following: 1. Develop a VHDL model of a complete QPSK ... FPGA. 2. Develop and implement a VHDL module and a suitable PC ... and demonstrate your solution in VHDL. In particular, present an analysis ... data used in within the VHDL code and an analysis for ... | Fixed | 1 | $300 | Management, Matlab & Mathematica, Report Writing, Testing / QA, Verilog / VHDL | Sep 24, 2009 | - | ||
| I'm working on a small project which implements a simple (slow) serial CPU ... you to have a good knowledge of VHDL, Experience with Altera FPGA and the Quartus ... . A bonus upon succesful completion of the project is discussable. Expected time needed is a ... | Fixed | 13 | $183 | Electrical Engineering, Electronics, Verilog / VHDL | Jun 5, 2011 | - | ||
| I need VHDL code written for a Nexys2 Board from Digilent, Inc. that focus only on the refresh rate of the VGA Monitor displaying in the color black and White. Each color should be connected to a switch so I can test good and bad refresh rates for each ... | Fixed | 9 | $174 | Electrical Engineering, Engineering, Verilog / VHDL | Jul 20, 2011 | - | ||
| ... radar )- 2. detection algorithm 3. compression algorithm all these 3 developed in VHDL or may in matlab FFT - in FPGA ( field programming gate array ) parallel and make a architecture with VHDL and compare with different software | Fixed | 6 | $1425 | Matlab & Mathematica, Verilog / VHDL | Sep 6, 2011 | - | ||
| Fixed | Nov 20, 2011 | - | ||||||
| Fixed | Nov 29, 2011 | - | ||||||
| Hi, I am looking for a good Verilog coder who can code some basic logic design. PM me ... like it done by Thursday so if you take the project, you will be given two days at most to ... take more than an hour or two if you're familiar with Verilog. Thank you | Fixed | 13 | $327 | Software Architecture, Verilog / VHDL | Dec 6, 2011 | - | ||
| ... - hardware already available We provide UCF-file and Verilog interfaces to our logic. If necessary we ... provide an evaluation hardware. Expected deliverals: Xilinx ISE 9.1 project including well-documented Verilog sources and simulation We will ... | Fixed | 5 | $1080 | Electronics, Engineering | Jun 8, 2007 | - | ||
| We are looking for a vhdl implementation on the spartan 3e board which ... three additional features/implementations on this same project from any of the following spartan 3e ... and an accurate overall explanation of the project. Hopefully, you could now be the ... | Fixed | 5 | $202 | Verilog / VHDL | Feb 24, 2011 | - | ||
| ... for a digital designer with experience in VHDL, preferrable on ASIC, but FPGA will be ... . I am working on a complex project that will last a long time ... more work. Thank you. Regards, Nick Keywords: VHDL, digital design, electronics, VLSI, ASIC, FPGA ... | Fixed | 27 | $16 | Electronics, PCB Layout, Verilog / VHDL | Nov 6, 2011 | - | ||
| This project is on VHDL programming.You need to be professional in VHDL programming.All the information is given in ... instructions. 3. Design and individually simulate behavioural VHDL models for the dataflow components. Combine ... | Fixed | 1 | $100 | Building Architecture | Dec 5, 2011 | - |
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