Bit cpu vhdl jobs:
| Project Name | Description | Type | Bids | Avg (USD) | Skill Required | Started | Ends | |
|---|---|---|---|---|---|---|---|---|
| ... that simulates the performance of an 8-bit CPU. You are required to define an ... that can simulate the functionality of your CPU Test your design Discuss and conclude ... excluding any listings) describing the design and implementation of the CPU simulator. | Fixed | 5 | $161 | C Programming | May 1, 2008 | - | ||
| ... simulates the performance of an 8-bit CPU. You are required to define an instruction set, describe the ... can simulate the functionality of your CPU 6. Test your design 7. ... the design and implementation of the CPU simulator. Deadline is 11-05-2008 ... | Fixed | 3 | $183 | C Programming | May 8, 2008 | - | ||
| ... simulates the performance of an 8-bit CPU. You are required to define an instruction set, describe the ... can simulate the functionality of your CPU 6. Test your design 7. ... the design and implementation of the CPU simulator. Deadline is 03-05-2010 ... | Fixed | 12 | $187 | C Programming | Apr 24, 2010 | - | ||
| ... set it up for me..i have instructions and have downloaded..i just dont know how to use it on 64 bit .. or if you can make my computer capatible with 32 bit.. I will pay 3 dollars an hour.. | Fixed | 3 | $70 | Cisco, Linux, Objective C, Oracle, System Admin | Dec 16, 2009 | - | ||
| I need a 16-bit basic CPU unit designed in VHDL must run under SYMPHONY SONATA. I also have more specifications feel free to request them. | Fixed | 1 | $500 | Apr 26, 2004 | - | |||
| ... is taken and all its corresponding CPU registers are loaded, then one ... 2 is taken and all its CPU registers are loaded, then one ... then i have to code in VHDL. Can you please help me ... processor design and coding in VHDL that implements the mentioned concept ... | Fixed | 7 | $271 | Electrical Engineering, Electronics, Engineering, Verilog / VHDL | Jul 27, 2010 | - | ||
| ... Design of System Buses Planning & Development of the CPU Architecture, Planning , Developing and Implementation of ISA ( ... Op-codes, Preparing the IP-Core of the CPU using VHDL coding, Preparation of Test Bench to study the Architecture and Simulation. | Fixed | 12 | $53833 | C++ Programming, Embedded Software | Mar 15, 2012 | - | ||
| ... which implements a simple (slow) serial CPU bus in a FPGA. The CPU bus is 2 bits wide and uses a transition based protocol. The code is written in VHDL and functional but the system ... to have a good knowledge of VHDL, Experience with Altera FPGA and ... | Fixed | 13 | $183 | Electrical Engineering, Electronics, Verilog / VHDL | Jun 5, 2011 | - | ||
| ... writing a very basic, single-cycle cpu that just operates : add,load,store,beq and slt in VHDL. im gonna pay 45$ for ... left. for some one who knows VHDL or assembly language doest take ... can provide you the link for VHDL download if interested in doing ... | Fixed | 3 | $42 | Electronics, Software Architecture | May 2, 2011 | - | ||
| ... the provided behavioural model for a 4-bit register, to compile, simulate and verify correct functional operation of an 8-bit device.( behavioral model for a 4- ... 3. Design and individually simulate behavioural VHDL models for the dataflow components. ... | Fixed | 1 | $100 | Building Architecture | Dec 5, 2011 | - | ||
| Write the VHDL description of the 32-bit MIPS ALU whose details ... your design using ISE or another VHDL simulator to prove the correctness ... Prepare a short report with the VHDL codes and the simulation results. ... VERY EASY JOB FOR WHO KNOWS VHDL. It's one of my ... | Fixed | 7 | $66 | Electrical Engineering, Electronics, Embedded Software, Microcontroller, Verilog / VHDL | Dec 1, 2010 | - | ||
| Its a digital clock using VHDL all data included in file Its basically works on the ... file: digital_clk.vhd test bench ///////////////////////////////// Its a digital clock using VHDL all data included in file Its basically works on the ... | Fixed | 12 | $53 | Electronics, Verilog / VHDL | Dec 20, 2011 | - | ||
| I need VHDL code written for a Nexys2 Board from Digilent, Inc. that focus only on the refresh rate of the ... the code myself so I can use Xilinx ISE Design Suite 13.1 to generate a bit file that will be loaded to the board with Adept Software. I need to be ... | Fixed | 9 | $174 | Electrical Engineering, Engineering, Verilog / VHDL | Jul 20, 2011 | - | ||
| To utilise structural and behavioural VHDL to model and simulate an 8-bit processor capable of implementing the attached instruction set. VHDL have to be used. For designing need multisim. | Fixed | 2 | $101 | Software Architecture | Dec 3, 2011 | - | ||
| Please help me to implement the MPIS single cycle CPU | Fixed | 4 | $7400 | Verilog / VHDL | Mar 28, 2011 | - | ||
| Write VHDL code in Xilinx ISE for Spartan 3. Program should add and substract 4-bit positive and negative binary numbers. Subtract is allowed if first number is bigger than second. If that condition ... | Fixed | 12 | $12 | Electrical Engineering, Electronics, Engineering | Jan 27, 2012 | - | ||
| ... a piece of software which i have created which is written in java therefore i would like somebody with a bit more experience then me ... time after they have been executed. I have the program written in java which does some of what i need but it needs more ... | Fixed | 2 | $55 | Java, Software Architecture | Mar 17, 2012 | - | ||
| ... is written in java therefore i would like somebody with a bit more experience then me to help on developing it a bit further. The software is used to calculate the CPU scheduling time according to the algorithms used in it. ... | Fixed | 4 | $38 | Java, Software Architecture | Mar 24, 2012 | - | ||
| ... do the following: 1. Develop a VHDL model of a complete QPSK ... FPGA. 2. Develop and implement a VHDL module and a suitable PC ... and demonstrate your solution in VHDL. In particular, present an analysis ... data used in within the VHDL code and an analysis for ... | Fixed | 1 | $300 | Management, Matlab & Mathematica, Report Writing, Testing / QA, Verilog / VHDL | Sep 24, 2009 | - | ||
| My MySQL server is using above 100% of CPU most of the time. I'm looking for someone ... apache. If you think you can accomplish that...please bit. Server: GenuineIntel, Intel(R) Core(TM)2 Quad CPU Q6600 @ 2.40GHz Memory: 8GB Disk space: 2x500 Load ... | Fixed | 20 | $127 | Engineering, Linux, PHP, System Admin | Oct 10, 2008 | - | ||
| Fixed | Mar 20, 2012 | - | ||||||
| I have an e-shop site hosted in shared server. The site is in joomla 1.5.23 and use virtuemart 1.19. Unique visitors are aobut 300 per day and gtmetrix.com score is around 87%. The problem is that my hosting company told me that i need to reduce my ... | Fixed | 4 | $99 | Javascript, jQuery / Prototype, System Admin, Web Security | May 10, 2012 | - | ||
| ... running on a dedicated server (Windows Server 2008 64-bit) with 16GB of DDR3 RAM, an Core i7 CPU, and is on Gigabit NIC. We recently upgraded ... built into the Windows server console is showing the CPU and RAM both running at 100%, and ... | Fixed | 28 | .NET, C# Programming, Microsoft, SQL, Windows Server | May 24, 2012 | - | |||
| I want to create a simple VHDL game! | Fixed | 5 | $126 | Verilog / VHDL | May 30, 2009 | - | ||
| Pipeline Datapath VHDL. build a structural model of the pipelined datapath in VHDL from behavioral components such that Hazard Detection and Forwarding Units and the Pipeline Registers as well as some reused components from single cycle version of the ... | Fixed | 0 | Software Architecture | Aug 24, 2009 | - | |||
| Hello I want a vhdl code for a digital clock to present hours and minutes in board of spartan 3 . The code should be wrriten by the freelancer him/her self not from copy from internet. A report should be included . Thank you | Fixed | 12 | $90 | Electrical Engineering, Engineering, Verilog / VHDL | Jun 12, 2011 | - | ||
| We are using a ARM 32-bit Cortex-M3 CPU: STM32F103R8T. We are looking for Help to setup a freertos (for example). Any other RTOS is welcome. If you have experience you are invited to bid. Open points: Modules for SPI, I2C, CAN Open, RS232 | Fixed | 7 | $1071 | C Programming, Electrical Engineering, Electronic Forms, Embedded Software | Sep 26, 2011 | - | ||
| Fixed | Nov 20, 2011 | - | ||||||
| I have a set of VHDL and microcontroller questions needing solution. They are basic questions if you know this topic. I have attached the questions for your assesement. Please only bid if you can provide solutions as soon as possible. | Fixed | 5 | Electrical Engineering, Electronics, Microcontroller, Telecommunications Engineering, Verilog / VHDL | Apr 30, 2012 | - | |||
| I have four algorithms that needs to be converted from the actual programing language C into VHDL or Verilog. Also I need the VHDL/Verilog code, the Simulation and a simple documentation. For more details, post a PM. | Fixed | 8 | $207 | C Programming, Verilog / VHDL | Jun 18, 2009 | - | ||
| ... radar )- 2. detection algorithm 3. compression algorithm all these 3 developed in VHDL or may in matlab FFT - in FPGA ( field programming gate array ) parallel and make a architecture with VHDL and compare with different software | Fixed | 6 | $1425 | Matlab & Mathematica, Verilog / VHDL | Sep 6, 2011 | - | ||
| ... , I am looking for a digital designer with experience in VHDL, preferrable on ASIC, but FPGA will be considered as well. I ... I will provide more and more work. Thank you. Regards, Nick Keywords: VHDL, digital design, electronics, VLSI, ASIC, FPGA | Fixed | 27 | $16 | Electronics, PCB Layout, Verilog / VHDL | Nov 6, 2011 | - | ||
| ... me to do the following: Set and adjust CPU load on the fly - for single or multiple ... XP, and Windows 7 (32bit and 64 bit). The source will be required, proper formatting ... GUI - text box with entry point for CPU load and an associated APPLY button. The ... | Fixed | 4 | $168 | .NET, C# Programming | Jan 11, 2012 | - | ||
| Fixed | Apr 18, 2006 | - | ||||||
| VHDL project Includes coding, initial report and final report. The board being used is: Altera® DE1 Development and Education board http://university.altera.com/materials/boards/de1/?hdl=Verilog&board=DE2&quartusII=9.0 | Fixed | 8 | $119 | Verilog / VHDL | May 7, 2010 | - | ||
| We are looking for a vhdl implementation on the spartan 3e board which must be utilizing the board's DAC feature. We also need additional two to three additional features/implementations on this same project from any of the following spartan 3e features: ... | Fixed | 5 | $202 | Verilog / VHDL | Feb 24, 2011 | - | ||
| ... cyclone 2 DE1 to design a voice recorder. Design the project using VHDL.The design should be able to record a minimum of 1 minute ... the on-board speaker or an external speaker. In need of the VHDL programme codes and a Report on the analysis and how the ... | Fixed | 4 | $613 | Verilog / VHDL | Sep 28, 2011 | - | ||
| I need you to do the following parts in the previous VHDL report that you have done for me . Before I hire you ... . 4) Add Appendix in the report which should include :- 4.1)VHDL code in full with brief ANNOTATION (Explaining of code function and why it ... | Fixed | 1 | $100 | Verilog / VHDL | Nov 28, 2011 | - | ||
| I need to translate 14 VHDL files (total ~3000 lines) to Verilog. | Fixed | 23 | $130 | Electrical Engineering, Verilog / VHDL | Mar 1, 2012 | - | ||
| IEEE paper implementation of the attached document. XIlinx ISE software VHDL coding of sign language recognition. | Fixed | 8 | $972 | Electrical Engineering, Electronics, Embedded Software, Verilog / VHDL | Mar 2, 2012 | - | ||
| I have many parts of one project, that need to be murged into one project in 2 days deadline. The language is VHDL, and the required tools are ModelSim and Quartus II. If you feel confident about these technologies, pre-bid. The details will be provided in ... | Fixed | 4 | Windows Desktop | Jun 15, 2004 | - | |||
| I need a expert in VHDL/Verilog behavioral. If you are please PM me, for more info on the project. Thank you | Fixed | 0 | Mar 15, 2007 | - | ||||
| I need Microchip PIC 16F84 to be done in VHDL | Fixed | 28 | $758 | Electronics, Engineering, Microcontroller, Verilog / VHDL | Oct 9, 2010 | - | ||
| Fixed | Dec 26, 2010 | - | ||||||
| Convert a Verilog source code to VHDL | Fixed | 4 | Electrical Engineering, Electronics, Matlab & Mathematica | Jan 2, 2011 | - | |||
| ... the clock line. SPI is a synchronous serial data bus. This report describes the design of Serial Peripheral Interface using VHDL and simulate using simulator. The transmitting and receiving parts are designed by taking the logic from the Parallel–in ... | Fixed | 15 | $123 | PHP, Software Architecture, Verilog / VHDL | Apr 12, 2011 | - | ||
| Finalise the VHDL code and test bench. Prepare the final report. This MUST be consolidated into a single report for the overall task, but will clearly show the contributions of the various sub-tasks. The report should include at least the following items: ... | Fixed | 0 | PHP, Software Architecture | May 20, 2011 | - | |||
| We experience regular CPU above 90% and need to examine CPU bottlenecks Setup and monitor these counters: SQL Server: SQL ... 25 EC2 Compute Units each) 1690 GB of instance storage 64-bit platform I/O Performance: High API name: m2.4xlarge Also ... | Fixed | 5 | $19 | .NET, C Programming, SQL | May 16, 2012 | - | ||
| Filter FIR in VHDL for cut low , med and high frequencies of audio. | Fixed | 6 | $1250 | .NET, C# Programming, C++ Programming, Data Processing, Java | Jun 8, 2010 | - | ||
| ... . We have had an ongoing cpu overload problem that needs to ... this post ], we start getting cpu loads that I have seen ... spike that increased from a cpu load of zero up to ... that it rose to a cpu load of about 5.5 ... right back up to a cpu load of 8-9. The ... | Fixed | 8 | $167 | Cloud Computing, Magento, MySQL, Nginx, PHP | Jan 15, 2011 | - |
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