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I need an Altera NIOS project setup to get started with a new development. The opencores.org Ethernet IP (10_100_1000 Mbps tri-mode ethernet MAC) needs to be embedded in Altera FPGA and connected to NIOS. Platform is Altera NIOS Development kit with Cyclone 3 (see terasic.com NIOS II Embedded Development kit). The ETHERNET-HSMC Card (same terasic.com site) is plugged into the kit to give access to Ethernet MACs. Deliverables: Quartus project and demo software for reading and writing to MII and Phy interface. Only unencrypted sourcecode is accepted. LGPL license or less is acceptable.