A folded-cascode CMOS amplifier design

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Bids
7
Avg Bid (USD)
$174
Project Budget (USD)
$30 - $250

Project Description:
The major design specifications are as follows:

1. Power supply: Vdd = 3.3V (or +/- 1.65V)
2. Differential Voltage Gain (Avd) >= 80dB
3. Output Voltage Swing Range >= 3V
4. Slew Rate (SR) >=10V/us for 10 pF Capacitor
5. Input Common Mode Range (ICMR) >= 2V
6. Common Mode Rejection Ratio (CMRR) >= 60dB
7. Unity Gain-Bandwidth: (GB) >= 100 MHz with a 10 pF load capacitance.
8. Phase Margin: f(GB) >= 60° with a 10 pF load capacitance.
9. Power dissipation: Pdiss<= 1mW.

Required SW:
1. HSpice / T-SPice
2. L-edit

Skills required:
Electrical Engineering, Electronics, Engineering
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OpAmp
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