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Electron Volt R&D

Electrical Engineer

Username: Dogbert256

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Location: Reno, United States United States

Member since: March 2012

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Portfolio

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Resume

Experience

Electronics Design Engineer

Feb 2012 - May 2012 (3 months)

Electron Volt Research and Development (Sole Proprietorship)

550 W. Plumb Ln, Ste B #254, Reno, NV 89509. Primarily involved in electronics design, component selection, PSPICE analysis, schematics, BOM, PCB layout, documentation, purchasing, fabrication, and test/validation of electronic products for clients. Specializing in designs to meet harsh industrial environmental requirements, manufacturability and testability targets, with the goal of high reliability and reasonable cost.

Product Development Engineer

Oct 2010 - Jan 2012 (1 year)

Sustainable Energy Solutions

620 S. 18th Street, Sparks, NV 89431. Embedded electronics development for a local renewable energy start-up company, including specifications development, electronics design, component selection, PSPICE analysis, signal integrity, schematics, BOM, PCB layout, documentation, purchasing, fabrication, test/validation, and firmware development.

Electronics Design Engineer

Jul 2008 - Sep 2010 (2 years)

Electron Volt Research and Development (Sole Proprietorship)

550 W. Plumb Ln, Ste B #254, Reno, NV 89509. Primarily involved in electronics design, component selection, PSPICE analysis, schematics, BOM, PCB layout, documentation, purchasing, fabrication, and test/validation of electronic products for clients. Specializing in designs to meet harsh industrial environmental requirements, manufacturability and testability targets, with the goal of high reliability and reasonable cost.

Assistant Research Electronics Engineer

Apr 1997 - Mar 2007 (9 years)

Desert Research Institute

2215 Raggio Parkway, Reno, NV 89512. Worked with DRI scientists on a wide variety of funded projects, in a wide variety of engineering roles, including proposal development, specifications development, systems engineering, electronics design, component selection, PSPICE analysis, PCB layout, documentation, purchasing, fabrication, test/validation, and software/firmware development. DRI scientists work on basic and applied research with project funding from government and private industry sources.

Product Development Engineer

Sep 1995 - Sep 1996 (1 year)

Intel Corporation

1900 Prairie City Road, Folsom, CA 95630. Part of a team developing Multi-Level Cell Flash Memory technology. Worked on CMOS semiconductor process improvements for Intel Corporation's original StrataFlash memory product, with emphasis on "showstopper" electrical issues caused by packaged induced stress. My work resulted in the implementation of a feasible solution for package induced stress that is used to this day.

Research Assistantship

Jan 1993 - Jul 1995 (2 years)

Morrison-Knudsen Corporation

800 Park Boulevard, Suite 200, Boise, ID 83712. Electronics design, PCB layout, and other tasks related to the development of microcontroller based data acquisition products for use in passenger railcars.

Contract Employee

Sep 1991 - Jan 1993 (1 year)

Hewlett-Packard Corporation (via Zero Defects, Inc.)

615 East 43rd Street, Boise, ID 83714. Majority of time spent working at H.P.'s Printer Division Headquarters in Boise, helping engineers and technicians to build, troubleshoot, and document robotics for automated assembly and test lines. Fabricated bed-of-nails and other functional testers used during the production of H.P.'s LaserJet printers.

Test Engineer

Dec 1988 - Jun 1991 (2 years)

Quality Thermistor, Inc.

2108 Century Way, Boise, ID 83709. Electrical Engineer for this electronics component manufacturer. In charge of customer test data, maintaining equipment calibration, and keeping the company on the military Qualified Products List. Also developed several in-house projects.

Education

Master of Engineering in Electrical Engineering

University of Idaho

1993-1995

Bachelor of Science in Electrical Engineering

University of Idaho

1980-1987

Certifications

Engineer-in-Training

Board of Professional Engineers and Professional Land Surveyors

Registered EIT in Idaho and California

Publications

Adaptive Neural Network Design Investigation using a Content Addressable Parallel Processor

University of Idaho

Digest of LACR (Laboratory for Advanced Communications Research)

Dasgupta-Huang Optimal Bounding Ellipsoid G[Z] Identification with Loop-in-System

University of Idaho

Digest of LACR (Laboratory for Advanced Communications Research)