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$10 USD / hour
Flag of GREECE
thessaloniki, greece
$10 USD / hour
It's currently 10:43 AM here
Joined January 15, 2014
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Irisweb I.

@IRISWeb

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$10 USD / hour
Flag of GREECE
thessaloniki, greece
$10 USD / hour
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Web Development - Graphic Design - Software Dev

IRIS Web motto is the complete satisfaction of customer demands. We have experience in the fields of electronics, computers and information technology, our ethics are focused on professionalism, innovation, reliability, consistency. Our people are qualified and suitable for every tasks in these fields.

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Portfolio

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1048399
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Experience

Electronics & Computer Engineers

Technical Company
Jul 2010 - Present

Education

M.Sc. Computer Science & Engineering

Panepistimion Ioanninon, Greece 2009 - 2011
(2 years)

M.Sc. Electronics & Computer Engineering

Polytechnion Kritis, Greece 2008 - 2010
(2 years)

Publications

Transition features for CRF-based speech recognition and boundary detection

IEEE
In this paper, we investigate a variety of spectral and time domain features for explicitly modeling phonetic transitions in speech recognition. Specifically, spectral and energy distance metrics, as well as, time derivatives of phonological descriptors and MFCCs are employed. The features are integrated in an extended Conditional Random Fields statistical modeling framework that supports general-purpose transition models. For evaluation purposes, we measure both phonetic recognition task accuracy and preci

Multiple time resolution analysis of speech signal using MCE training with application to speech recognition

IEEE
In this paper, we propose two methods of multiple time-resolution analysis of speech and their application to automatic speech recognition (ASR). Constant frame-rate multi-scale analysis is proposed based on a box of multi-scale features. Then a variable rate analysis is proposed based on the selection of the optimal temporal resolution on the fly by a properly trained non-linear classifier unit. The classifier's parameters are trained using the discriminative method of minimum classification error (MCE) t

Low power scan by partitioning and scan hold

IEEE
Scan testing dynamic power consumption can induce reliability problems in the circuit under test (CUT) during manufacturing testing. In this paper, we propose a scan chain partitioning technique, supported by a scan hold mechanism, for low power dissipation during the shift phase of the scan testing procedures. Substantial power reductions can be achieved either in built-in self test (BIST) or non-BIST scan-based testing environments, without test application time increase, fault coverage decrease, scan cel

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