Location: Bucharest, Romania 
Member since: May 2012
TTTech
Digital design, VHDL implementation and testing, FPGA synthesis of DO-254 certified TTEthernet and TTP chips.
Fraunhofer Institute for Integrated Circuits
Developped the back-end of a "Goniometer"-type receiver which was able to estimate the Angle of Arrival (AoA) and<br />the Round Trip Time (RTT) of a 6 channel FDMA signal. The whole Software Defined Radio system was<br />implemented in VHDL and tested on a Xilinx Virtex4 FPGA.<br />Among some others,the main tasks envovled the implementation of a Digital Down Converter as well as the<br />algorithms used in the angle-dependent spectrum estimation
Ingnieur en Electronique (Double degree)
ENSEEIHT - Ecole Nationale Supérieure d'Electrotechnique, d'Electronique, d'Informatique, d'Hydraulique et des Télécommunications
2010-2012
Electronics Enginner
Universitatea 'Politehnica' din Bucuresti
2008-2012
