Altera quartus jobs

Assalam o alaikum, I am looking for electrical engineers having expertise in following areas:  Embedded C Programming.  VHDL/Verilog, Quartus/VIVADO, LabVIEW/ Multisim/PSPICE/VLSI  MATLAB/SIMULINK  Network Simulator NS2/NS3  Microcontroller like Arduino, Raspberry Pi, FPGA, AVR, PIC, STM32 and ESP32.  IDEs like Keil MDK V5, ATmel studio and MPLab XC8.  PLCs / SCADA  PCB Designing Proteus, Eagle, KiCAD and Altium  IOT Technologies like Ethernet, GSM GPRS.  HTTP Restful APIs connection for IOT Communications. Actually I have multiple projects in different domains of electrical engineering and I already have a team of engineers working on them but due to workload I am looking for few more engineers to be a part of my team and work with us on regular basis.

We have a 4 output DVB-ASI Streamer PCIe card. For the PCIe function we use a PLX device which is now obsolete. We wish to use an Altera device for the PCIe function & increase the outputs to 8 independent outputs + 8 copies in the new version. Full development is ideal. But are also able to carry out some of the tasks.

...with a clear, well-reasoned state diagram. All synthesis, simulation, and verification have to be done in Quartus Prime so that I can open the project and build upon it later. What I need from you is twofold: first, the working design inside Quartus Prime—fully annotated, synthesizable and ready to compile—second, a custom-structured report that walks through the design decisions, the complete 64-bit truth table, the corresponding state transitions, and any simulation evidence that proves the implementation functions exactly as specified. Feel free to pick the HDL you prefer inside Quartus; consistency and clarity matter more to me than the language. Deliverables should include: • Quartus Prime project folder with all source files and tes...

We have a 4 output DVB-ASI Streamer PCIe card. For the PCIe function we use a PLX device which is now obsolete. We wish to use an Altera device for the PCIe function & increase the outputs to 8 independent outputs + 8 copies in the new version. Full development is ideal. But are also able to carry out some of the tasks.

...demonstration that off-loads the control algorithms onto an FPGA—ideally the Altera DE2-115 I already have on my desk. Right now I’m at the initial setup stage, so everything is still in pure Simulink. Your role is to guide me through the FPGA-in-the-Loop (FIL) workflow, get the controller blocks synthesised, and prove they behave identically once they’re running on silicon. Sensor integration and data logging can wait; the immediate focus is control-algorithm work and, in particular, thorough algorithm testing after it lands on the chip. Deliverables • Partitioned Simulink model with the guidance/control section prepared for HDL Coder • Synthesizable VHDL/Verilog project targeted to the DE2-115 and built in Quartus • Configured Sim...

I’m building a small proof-of-concept that turns the raw analog voltage from a capacitive proximity sensor into a clean Near/Far decision with hysteresis and streams that result over a UART link to my computer. The entire design must be written in synthesizable SystemVerilog and kept intentionally simple so it compiles easily in a standard FPGA flow (ModelSim/Vivado/Quartus—your choice). Key points you’ll handle • Sample an external ADC value that represents sensor capacitance. • Convert that value to a Near or Far state using sensible default thresholds and add hysteresis so the output doesn’t chatter. • Transmit “NEARrn” or “FARrn” (or similarly short strings) via a 1-stop-bit, 8-N-1 UART. • Make th...

I need a VHDL...Overflow handling: if more than N words arrive before TLAST, raise a dedicated error line and discard the surplus. • Deliverables: – Readable, synthesizable VHDL source for the core. – A self-checking test-bench (ModelSim/Questa or similar) that drives typical and corner-case traffic, shows the error path, and logs results. – Simple build notes so I can drop the files into Vivado or Quartus and recreate your simulation. Signal naming and coding style should follow AXI4-Stream convention; please include generics for word width and packet length. Clear comments are expected so I can extend the design later. If you’ve done AXI stream processing blocks before, this will feel familiar—let me see your proposed timeline a...

We are looking for a skilled FPGA Design Engineer with solid experience in VHDL development and FPGA toolchains (Vivado, Quartus). You will collaborate remotely using our servers and follow a structured workflow that includes version control, automated analysis, and verification. The ideal candidate is proactive, detail-oriented, and comfortable working on real FPGA design tasks, from module development to system-level integration. Responsibilities Design, implement, and verify VHDL modules for FPGA-based systems. Work with Xilinx (Zynq) and Intel (Altera) FPGA platforms. Integrate and debug high-speed serial protocols such as Aurora, SDI, HDMI, 10 GbE, and other Gbps transceiver-based links. Support signal processing and video processing implementations on FPGA. Contribute...

...drawing clean schematics and selecting ICs to running simulations and walking us through timing or power considerations before we commit to the board. Typical tasks you might handle include: • Translating our functional block diagrams into gate-level or HDL implementations (Verilog/VHDL welcome). • Producing simulation files and screenshots that prove the logic works (Multisim, Proteus, Quartus, ModelSim—whatever you are comfortable with). • Supplying concise notes so the rest of the team can reproduce or extend the design. If you have breadboard or FPGA experience and can show a quick demo video, that’s a bonus but not essential. When you reply, link or attach a couple of past digital-circuit projects so we can see your style and depth. ...

I need assistance with a college project to design a Multi-Protocol Conversion Unit (MPCU) using Verilog HDL. The MPCU should convert data between SPI, I2C, and UART protocols. Requirements: - Verilog implementation for SPI, I2C, UART (both master and slave) - Top-level MPCU module to connect ...between SPI, I2C, and UART protocols. Requirements: - Verilog implementation for SPI, I2C, UART (both master and slave) - Top-level MPCU module to connect all protocols - Simulation testbenches and waveforms - Final report detailing design and results Tools: Xilinx Vivado or equivalent Ideal Skills: - Proficiency in Verilog HDL and digital design - Experience with FPGA tools (Vivado/ModelSim/Quartus) - Solid understanding of SPI, I2C, UART protocols Note: Academic project; only Indian f...

I need help setting up and running some Verilog code on an Intel FPGA. My primary requirement is assistance with setting up the development environment using Intel Quartus Prime. Key Requirements: - Expertise in setting up Verilog projects for Intel FPGAs - Proficiency in using Intel Quartus Prime for development - Ability to guide through the installation and configuration process Ideal Skills and Experience: - Strong background in Verilog programming - Experience with Intel Quartus Prime software - Familiarity with FPGA development and deployment processes - Good communication skills to provide clear guidance and support I'm looking forward to working with someone who can help streamline the setup process and ensure the code runs smoothly on the FPGA.

I need an FPGA expert to read and display TX/RX values from 12 SFP modules via I2C on an Altera Cyclone FPGA. The output should be shown on an LCD screen. Key Requirements: - Use I2C to communicate with SFP modules. - Read TX/RX values and process them. - Display values on an LCD screen. Ideal Skills: - Proficiency in Altera Cyclone FPGA programming. - Strong knowledge of I2C protocol. - Experience with LCD interfacing and display logic. Please ensure your bid includes relevant past experience with similar projects.

...my DMA-compatible FPGA device Ensure the driver loads cleanly in Windows and shows "working properly" You do not need to support actual audio playback, DMA engines, or IRQ logic unless very basic stubs are required. This is for device spoofing and behavior simulation — not real hardware function. Requirements: Experience with PCIe IP cores Comfortable working with FPGA toolchains (Vivado, Quartus, etc.) Ability to simulate capability chains and config space correctly Ability to debug driver init logs if needed Deliverables: Firmware image file Source HDL files Brief explanation of MMIO logic used Confirmation that driver loads in Windows Bonus if: You’ve worked with PCIe spoofing before You can help simulate additional behavior like MMIO state...

I'm in need of an IT professional with a strong background with software tools. The project primarily revolves around the setup and maintenance of several key software tools used in FPGA design and simulation. Key Requirements: - Proficiency with istallation and setup of software tools like Xilinx Vivado, Intel Quartus, Microsemi Libero, QuestaSim/ModelSim/Aldec Active-HDL, Riviera and AlintPro. - Experience with installation and setup, configuration and optimization, as well as troubleshooting and support for these software tools. - setting up secure VPN access, and handling administrative network tasks. The candidate will also be responsible for documenting each setup process in a step-by-step guide to ensure reproducibility. Maintain an internal wiki or knowledge base for ...

I'm in need of an IT professional with a strong background with software tools. The project primarily revolves around the setup and maintenance of several key software tools used in FPGA design and simulation. Key Requirements: - Proficiency with istallation and setup of software tools like Xilinx Vivado, Intel Quartus, Microsemi Libero, QuestaSim/ModelSim/Aldec Active-HDL, Riviera and AlintPro. - Experience with installation and setup, configuration and optimization, as well as troubleshooting and support for these software tools. - setting up secure VPN access, and handling administrative network tasks. The candidate will also be responsible for documenting each setup process in a step-by-step guide to ensure reproducibility. Maintain an internal wiki or knowledge base for ...

I'm in need of an IT professional with a strong background in FPGA toolchain management, particularly with software tools. The project primarily revolves around the setup and maintenance of several key software tools used in FPGA design and simulation. Key Requirements: - Proficiency with software tools Xilinx Vivado, Intel Quartus, Microsemi Libero, QuestaSim/ModelSim/Aldec Active-HDL, Riviera and AlintPro. - Experience with installation and setup, configuration and optimization, as well as troubleshooting and support for these software tools. - setting up secure VPN access, and handling administrative network tasks. The candidate will also be responsible for documenting each setup process in a step-by-step guide to ensure reproducibility. Maintain an internal wiki or knowle...

Spyglas,VCS,DC,DFT,Verdi,Catapult,Synplify,VerilogXL,Virtuoso,Xcelium,Spectre,Allegro,Vivado,Quartus,ModleSim, Matlab,Octave,Signal Generator,Logic Analyzer,Anaconda,Tensorflow,Keras,Darknet ,notepad++. Language mastery: Verilog,SystemVerilog,UVM,C,C++,VHDL,Python,Firmware etc. Familiar with using: Linux, Windows,Unix,MS-DOS,FreeRTOS. PreviousFields: AISC/IP/IC design,SOC design/verification,FPGA Design/Verification and debugging,AI (especially deep learning),complex digital systems,complex communication systems,mixed digital and analog systems. Work experience focused in Beijing China 5+ years of ASIC experience and 10+ years of FPGA experience, experienced Senior Technical Lead with a demonstrated history of working in the semiconductors industry. Part of 5+ tape outs....

I am seeking a freelancer to implement a traffic signal controller using the Altera DE2-115 board. The project is intended for educational demonstration purposes, so clear and effective design is crucial. Key Requirements: - Use of Verilog to program the board. - Implementation of a fixed-time sequence traffic signal pattern. - Inclusion of pedestrian crossing signals, which should be activated via the board's key button. - Utilization of the board's LCD screen to display the current signal state. Ideal Skills: - Proficiency in Verilog programming. - Experience with the Altera DE2-115 board. - Understanding of traffic signal patterns and controllers. - Ability to design for educational purposes.

Looking for someone that is an expert in Altera cyclone to help me figure out the issue am having with my blaster connection. Circuit is good and all voltages are in the right place but am not able to connect to Cyclone 3 chip with Quartus

I'm looking for an experienced FPGA Verification engineer to help with unit testing my existing Verilog code. The primary focus will be on conducting functional tests to ensure the integrity and performance of the code. Ideal Skills: - Proficient in Verilog with significant experience in FPGA software engineering. - Strong background in designing and implementing unit test...tests. - Familiarity with FPGA design and optimization. - Excellent problem-solving skills and attention to detail. Experience: - Proven track record of successful FPGA code testing. - Experience with Class C Software - Experience with writing code and unit test for medical devices - Experience with Verilog is essential, prior experience with VHDL or SystemVerilog is a plus. - Familiarity with Quartus ...

...skilled PCB designer with experience in multi-layer layouts, specifically for industrial equipment. Key Requirements: - layouta multi-layer PCB incorporating various components including an FPGA, ADC, power regulator, TI DDC114, and DAC. Design has already been done, layout as well, but layout is not done well and must be redone. The existing design will be provided as Altium set of files. Since Altera can export to other formats it would be okay to use other tools as well as long as Altium can re-import the format. - Ensure that the design is robust and suitable for industrial use. Ideal Skills: - Expertise in multi-layer PCB design - Experience with industrial equipment - Proficient in using PCB design software - Knowledgeable in integrating components like FPGA, ADC, powe...

Looking for an Electronic engineer that understands Digital systems that can evaluate my circuit, simulate and see any issues that could be happening on it. MUST HAVE EXPERIENCE WITH ALTERA CYCLONE FAMILY CHIPS MUST HAVE EXPERIENCE USING ALTIUM Needs someone to start immediately

... Assist in performance testing and optimization of FPGA designs. Requirements: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field. Minimum of 3-5 years of experience in FPGA design and development. Proficiency in hardware description languages (HDLs), such as Verilog or VHDL. Experience with FPGA design tools and simulators, such as Xilinx or Altera Quartus. Understanding of digital signal processing (DSP) concepts and architectures. Knowledge of FPGA-based system architectures, including memory interfaces and communication protocols. Excellent problem-solving skills with an attention to detail. Strong communication skills for collaboration with other team members. Ability to work independently and as part of a te...

I'm looking for a skilled individual to create an educational 7-segment display using Quartus software. This display will specifically be used to portray numbers and will be interfaced with physical buttons. Key Responsibilities: - Develop a 7-segment display in Quartus software. - Ensure the display accurately showcases numbers. - Integrate the display with physical buttons for user interaction. Ideal Skills and Experience: - Proficient in Quartus software. - Strong understanding of 7-segment displays. - Experience with interfacing hardware with software. This project will be an excellent addition to your portfolio and would be a great opportunity for someone interested in educational tools development.

I'm looking for a skilled individual to create an educational 7-segment display using Quartus software. This display will specifically be used to portray numbers and will be interfaced with physical buttons. Key Responsibilities: - Develop a 7-segment display in Quartus software. - Ensure the display accurately showcases numbers. - Integrate the display with physical buttons for user interaction. Ideal Skills and Experience: - Proficient in Quartus software. - Strong understanding of 7-segment displays. - Experience with interfacing hardware with software. This project will be an excellent addition to your portfolio and would be a great opportunity for someone interested in educational tools development.

I'm in need of a Verilog expert proficient with Quartus Prime Toolchain. Key Requirements: - Professional with Verilog: Need someone experienced in designing digital circuits and implementing specific functionalities using Verilog. - Proficiency with Quartus Prime: Familiarity with the Quartus Prime Toolchain is a must. I need to design, simulate, implement and test a digital circuit using the Quartus Prime toolchain as per the specifications I will provide and demonstrate the workflow when using the Verilog HDL to construct a design for a physical Field Programmable Gate Array (FPGA) target. Please apply if you have the required expertise. No teams or companies please.

I'm currently seeking an individual who is not only proficient in VHDL coding but also in Quartus design implementation. Key Responsibilities: - Work on specific tasks related to VHDL coding - Implement design using Quartus While the overall aim of the project and the timeline aren't specified yet, I am eager to work with someone who is flexible and can adapt as per project needs. The ideal candidate for this role should be based in Pakistan, knowledgeable in FPGA programming, dependable, efficient, and proactive when it comes to troubleshooting and problem-solving.

I'm in urgent need of skilled VHDL/Quartus professionals from Pakistan for a project. I will clarify the specifics once a mutual understanding and agreement is reached. Ideal skills for the job include: - Proficiency in VHDL/Quartus - Ability to design, troubleshoot and optimize digital circuits - Ability to work independently or with minimal supervision - Excellent communication skills to effectively explain intricate concepts or problems Experience level can range from beginner to expert. The expectation, however, is the ability to deliver quality work within the stipulated time-frame.

I'm looking for an individual with expertise in Altium Designer. This project involves replacing an obsolete Xilinx FPGA with an Altera part. The initial project has been done in Altium Designer. ECAD would need to be done in Altium 19.

...freelancer with expertise in FPGA coding to bring a custom logic design project to life in Noida (Delhi/NCR). **Project Objectives:** - Development and implementation of custom logic designs using FPGA. - Ensuring designs are efficient, reliable, and meet project requirements. **Skills and Experience:** - Strong background in FPGA programming and design, with specific experience in either Xilinx, Altera, or Lattice platforms preferred. - Proven ability to develop and optimize custom logic designs. - Excellent problem-solving skills and creativity in designing unique solutions. - Ability to work independently and deliver project milestones on time. **Application Requirements:** - convert LVDS signals to MIPI CSI2. - preferably using Lattice crosslink. This project offers an ex...

I'm seeking a talented individual with a strong background in VHDL and FPGA design, specifically with Altera products, who can successfully implement communication interfaces within my project. The ideal candidate will possess a deep understanding of UART protocol and be capable of integrating it with other interfaces. Requirements: - Proficiency in VHDL programming for FPGA - Experience with Altera FPGA design tools - Successful implementation of UART interfaces - Knowledge in LAN and USB communication The scope of the project includes: - Implementing a low-speed UART interface (up to 115200 bps) - Integrating UART with LAN and USB interfaces on the FPGA The right freelancer will have a strong portfolio demonstrating their expertise in FPGA interface design and commu...

i am looking for an individual who can do perform the project on Quartus in VHDL formate. We are looking for only experts.

I am looking for an expert in Verilog/Quartus II I will share the details of my task in chat

KP4-FEC ENCODER DECODER RS (544,514) including documentation and explanation. Verilog files and simple testbench to prove the run on Quartus II. 514 data symbols per codeword 544 data plus parity symbols per codeword Codeword size = 10 * 544 = 5440 bits Correcting capability up to 15 symbols within a codeword PAM4 modulation

I am looking to hire a freelancer to design an FPGA function generator using a Altera MAX 10 FPGA, 10M08SAE144C8G that produces a frequency of 10 MHz and above. The desired waveforms are sine, square, and triangle. This function generator should also have a single channel. If you think you have the skills to help me with this project, feel free to bid on it. Thank you!

I am looking for someone to provide support with a Quartus Prime project. Specifically, I need help troubleshooting and debugging a basic project, and it needs to be completed within a week. The person I'm looking for should be knowledgeable and experienced with Quartus Prime, as well as troubleshooting and debugging. If you think you have the qualifications to help, please get in touch - I'm ready to get started!

My project is about FPGA programming for control systems. I'm using the Altera Cyclone V board and the preferred programming language is Verilog. This project requires someone with experience in FPGA programming and the design of embedded systems. The programmer should be able to develop design flows for FPGA devices, debug them and modify existing designs for better performance. The knowledge of hardware description languages such as VHDL and Verilog is crucial, as they will be used for implementation and testing of the designs. Additionally, some knowledge of microcontrollers and communication protocols will be required. The right person for this job should have strong problem-solving skills, excellent coding and debugging capabilities, and a deep understanding of hardware in...

Project Title: Altera DE0 Board Programming Assistance Description: I am seeking a freelancer who can provide programming assistance for my Altera DE0 board project. I require expertise in VHDL programming language and the ability to modify existing code as well as start from scratch. Skills and Experience: The ideal candidate for this project should have: - Proficiency in VHDL programming language - Experience with Altera DE0 board - Strong troubleshooting and debugging skills - Knowledge of hardware design consultation Specific requirements: - Provide programming assistance for the Altera DE0 board - Modify existing code and develop new code from scratch - Troubleshoot and debug any issues that arise during the programming process - Provide hardware design ...

I am looking for an experienced FPGA developer to help me with a project. The desired application for this project is Embedded Systems and the software preference is Telecom, which I need to be completed within 1 month. The expertise of the developer should be suitable for this type of development, and must have experience with Xilinx Vivado, Intel Quartus or Lattice Diamond. Time is of the essence, so I’m looking for someone who can hit the ground running and begin the project as soon as possible. If you feel you have the necessary skills and experience for this project, I look forward to hearing from you.

Hello,I am looking for devs who has experience and knowledge in FPGA to interface RF AFE chip from analogue device(exact part number via chat) Desired FPGA- xilinx Zynq/ equivalent series, Cyclone/equivalent from altera. The FPGA will be interfaced with the AFE and will act as an DSP. Apart from the AFE the FPGA is expected t be interfaced with: 1) Display module 2) Keypad 3) Memory 4) Microphone 5) ESP32C3 and GNSS module. Additional MCU/processor can be added to reduce the burden on FPGA. It can be decided after discussing. The FPGA will perform the DSP task and will be used to transmit RF waveforms. It will be used to perform frequency hopping and encryption (AES-256/SHA) task for the waveform. More detailed information via chat. Eligibility: The freelancer must have...

I'm looking for an experienced programmer to work on an LAB project for a traffic light controller. The controller should have basic functionality as well as advanced features such as pedestrian crossings and timers for different traffic scenarios, customizable options included. i use Quartus in school so it needs to be done on Quartus. If you cant then just give me all the codes and block diagrams and the report. The lab project requires my last three digits of student number which is 378. so my counter number is 18. dont worry about DE0-CV board. The completion of the project is needed within a day, so I am looking for someone who can dedicate their time and energy to complete this task promptly.

I am looking for a person who can work with Quartus Prime to help me with designing a digital circuit. I will provide detailed instructions for the specific tasks that need to be done. The project will require documentation for all tasks. Ideal Skills and Experience: - Experience in designing digital circuits using Quartus Prime - Proficiency in programming FPGA - Knowledge of simulating designs using Quartus Prime - Strong attention to detail for documenting tasks

...format instruction has the following fields: 15 14..12 11..9 8..7 6..4 3..0 Funct7 rs2 rs1 Funct3 rd opcode R-type Note that Funct3 and Funct7 fields are not used and should be set to zeros. Modify the pipelined data path to allow the correct execution of the ubl instruction in addition to the existing instructions. The branch address is determined in the instruction decode (ID) stage. Use the Quartus block editor tools to highlight your modification on the block/schematic diagram. Testing and Simulation Given the following RISC-V assembly program. Note that the code does not have any data hazards. Complete the following steps to test and simulate your design: 1. Encode the instructions in the given program and create the memory initialization file to initialize your instruc...

I am an EE engineer. I have lots of experience designi...Assembly language and C/C++ (both procedural and OOP). *for STM and nrf controllers Mbed OS could be one of the choices for programming the MCU. I have done lots of projects in the field of wireless communication and IoT using different wireless communication protocols like BLE, RF, WiFi (Cloud), etc. In the field of bit streaming, high-speed processing and ML, I am able to program both Xilinx and Altera in VHDL or C/C++ for Microblaze or NIOS II processors. For manufacturing purposes, I can provide component selection and BOM which suits your needs for a durable, efficient, and effective design. ABOUT YOUR PROJECT, I have done lots of similar projects before and can handle your project easily. We may discuss it more over cha...

...developing co-design projects. There are many possible solutions to the design problems depending on the way in which you choose to partition each problem. HW/SW Specs: The target embedded systems platform can be either the AlteraDE0 FPGA platform or the PSOC. Both devices/boards provide the opportunity to implement low-level, interrupt driven, device drivers along with the custom hardware. Altera DE0 Board: This board has a Cyclone III FPGA fitted. This supports a ’soft-core’ processor integrated with custom hardware. Using the Nios2 softcore CPU as a base you will implement a system to control a robot arm. There is the potential to use a small embedded O/S, FreeRTOS, uCLinux, or to write your own scheduler for this solution. PSoC: PSoC is industry&rsqu...

I'm looking for an expert in VHDL and Quartus II from Pakistan to design a specific digital system of intermediate complexity. The ideal freelancer will have experience in designing digital systems using VHDL and Quartus II.

analysis and synthesis of HDL designs, compile designs, perform timing analysis, examine RTL diagrams, simulate a design's reaction to different stimuli, and configure the target device with the programmer.

Hi Sunil P., I noticed your profile and would like to offer you my project. my project is create AWGN generator by PRBs and using box muller, So i did prbs generator already and now i'm stucking on Box muller method it's always error about real type the process of box muller is receive value from prbs 4 bits and do operating that must use real then transmit output by 8 bit **i'm us...P., I noticed your profile and would like to offer you my project. my project is create AWGN generator by PRBs and using box muller, So i did prbs generator already and now i'm stucking on Box muller method it's always error about real type the process of box muller is receive value from prbs 4 bits and do operating that must use real then transmit output by 8 bit **i'm usin...

I want someone to debug my code and that code must run on Quartus II 13.1 **i'm using cyclone IV and Quartus II 13.1 my project is create AWGN generator by PRBs and using box muller, So i did prbs generator already and now i'm stucking on Box muller method it's always error about real type the process of box muller is receive value from prbs 4 bits and do operating that must use real then transmit output by 8 bit MY BUDGET IS 20$ cause i did it already 70% of my project. reply me and then i'm gonna show my code.

I have a board i need to fix for an equipment in my store. Looking for an FPGA expert that can debug the program files i got from the manufacturer. I was told this should be simple for someone that knows what they are doing.