Assemblyx86 verilog vhdl jobs

Filter

My recent searches
Filter by:
Budget
to
to
to
Type
Skills
Languages
    Job State
    3,112 assemblyx86 verilog vhdl jobs found, pricing in USD
    $22 Avg Bid
    1 bids

    I have a Arduino sketch with Motor control. I want to change this code into VHDL or Verilog HDL. This is simple project. If anyone knows Arduino and FPGA, it takes one day to do it.

    $156 (Avg Bid)
    $156 Avg Bid
    17 bids

    I have a VHDL+ TESTBENCH CODE. I want to create a small document. CODES AND MARKING SCHEME IS GIVEN THE DOC FILE.

    $25 (Avg Bid)
    $25 Avg Bid
    1 bids

    Create a project about a 128x3 (128 words, with 3 bits at each word) single-port RAM in Verilog, simulate the design, and load it into the Cyclone IV chip on the DE0-Nano board. The design uses two push-buttons and one DIP switch as inputs. •One side of the DIP switch clears the memory address (not the memory contents). •The depressing of the first push-button indicates a memory write...

    $54 (Avg Bid)
    $54 Avg Bid
    6 bids

    Looking for a competent freelancer in FPGA, VHDL, Simulink and Python to do some work for me. Please read the attached document for full project specification

    $642 (Avg Bid)
    $642 Avg Bid
    10 bids

    I need parse Verilog (vhdl) code for fpga, structure the same code and rewrite to another fpga. The project is ready.

    $3823 (Avg Bid)
    $3823 Avg Bid
    17 bids

    VHDL code of optimization algorithm fixing.

    $59 (Avg Bid)
    $59 Avg Bid
    9 bids

    DVLSI project 'ASIC design of face detection using haar wavelet'. Use verilog, FPGA and Viola Jones algorithm

    $298 (Avg Bid)
    $298 Avg Bid
    2 bids

    VHDL code of optimization algorithm fixing.

    $35 (Avg Bid)
    $35 Avg Bid
    7 bids

    I need someone who knows verilog. I will provide the complete details in the chat.

    $40 (Avg Bid)
    $40 Avg Bid
    1 bids

    I have been tasked to write a FSM in verilog. The details are in the attached file. I have also attached a previous code I wrote to change ASCII into 7 segment displays, as I know that will be helpful to completing the FSM.

    $65 (Avg Bid)
    $65 Avg Bid
    5 bids

    clearly explain your datapath and control, and comment every single line of VHDL code

    $142 (Avg Bid)
    $142 Avg Bid
    8 bids

    This is basically a VHDL Programming to implement ALU for two 4-bit input numbers. I need the vhdl program, constraint files and the schematic logic design as well. Please reply me asap as i need it by this Tuesday morning. Thanks

    $20 (Avg Bid)
    $20 Avg Bid
    3 bids

    Hi, PLEASE HEIP. I have a activity. It is design a 4-bit asynchronous up down counter using xilinx software. I want truth table, k maps and VHDL CODE + TEST BENCH. Specially i want 2 different VHDL + TEST BENCH But all answers must be the same. IDE DESIGN SUITE 14.2V

    $37 (Avg Bid)
    $37 Avg Bid
    2 bids

    I have to write the Verilog code(will post what i came up with below) for a 4-bit arithmetic/logic unit (ALU). The requirements are as follows: The ALU operate on inputs that are 4 bits wide. inputs aluin_a and aluin_b, a carry in named Cin and operation code named OPCODE. Inputs aluin_a, aluin_b and OPCODE are 4 bits wide. Cin is 1-bit wide. outputs will be alu_out and Cout. Output alu_out (wh...

    $70 (Avg Bid)
    $70 Avg Bid
    3 bids

    Do you have FPGA board? If yes I have a simple task to be done in FPGA with a sim,ple report. Interested freelancer is expected to use VHDL Language. Quartus V 17.0 will be better. Link will be provided Please bid only if you can work with Quartus and V17.0 to be prpecise. Its needed ASAP

    $20 (Avg Bid)
    $20 Avg Bid
    6 bids

    I want someone who can teach me system verilog and perl language completely . I need someone who can guide me to grab a opportunity as a design verification engineer.

    $27 (Avg Bid)
    $27 Avg Bid
    4 bids

    Do you have FPGA board? If yes I have a simple task to be done in FPGA with a sim,ple report. Interested freelancer is expected to use VHDL Language. Quartus V 17.0 will be better. Link will be provided Please bid only if you can do. Its needed ASAP

    $20 (Avg Bid)
    $20 Avg Bid
    3 bids

    Do you have FPGA board? If yes I have a simple task to be done in FPGA with a sim,ple report. Interested freelancer is expected to use VHDL Language. Quartus V 17.0 will be better Please bid only if you can do. Its needed ASAP

    $13 (Avg Bid)
    $13 Avg Bid
    3 bids

    Do you have FPGA board? If yes I have a simple task to be done in FPGA with a sim,ple report. Interested freelancer is expected to use VHDL Language Please bid only if you can do. Its needed ASAP

    $21 (Avg Bid)
    $21 Avg Bid
    6 bids

    I need help building ASIC using bitmain chips. I will need the PSU, hashing boards, controller designed. Delivarables would be vHDL or verilog files, BOM, PCB layouts, etc. that would be required in producing the ASIC machine by giving such delivarables to PCB manufacturer.

    $123 (Avg Bid)
    $123 Avg Bid
    4 bids

    I need a MATLAB simmulink VDSL simulation to be completed. I am looking to see how distance will attenuate a VDSL signal. Can discuss more technical details.

    $45 (Avg Bid)
    $45 Avg Bid
    2 bids

    To detect circles by hough transformation in verilog. the board is spartan-6.

    $30 (Avg Bid)
    $30 Avg Bid
    1 bids

    This should include the Verilog HDL code of your MPZ design and simulation results to show the correct behavior, or any other interesting observation (e.g. maximum clock frequency of the design).

    $22 (Avg Bid)
    $22 Avg Bid
    4 bids

    I've designed some verilog code, though it isn't working as expected- seemingly as I don't have enough experience with the terminology of the language. The code monitors a +12V/-12V Squarewave line. An external system drops the +12V portion of the Squarewave to 9V, then 6V, and then 3V- so that the line oscillates between 12/-12, then 9/-12, then 6/-12, then 3/-12 (all in volts). W...

    $13 (Avg Bid)
    $13 Avg Bid
    6 bids

    We are looking for a talented and driven hands on Electrical Engineer who will be part of creating an incredible cutting edge technology system. And will focus on the design, construction, and troubleshooting of compact and reliable embedded electrical systems . This includes electrical sub-system design, integration, PCB layout, and frequent hands-on work in lab building and debugging electrical ...

    $35 / hr (Avg Bid)
    $35 / hr Avg Bid
    35 bids

    I am using Altera DE2-115 FPGA board to configure it using Quartus software 17 lite edition. We have to use QSYS to assign addresses and link the processor, then assign inputs and outputs in VHDL and pin planner in Quartus, and then use NIOS II processor for Eclipse to write a program in C and run the board. I am seeking some help in building this mini thing. I am attaching a pdf file for the tas...

    $22 / hr (Avg Bid)
    $22 / hr Avg Bid
    14 bids

    I need a verilog code that create a 16 bit "Calculator" that uses the slide switches as binary input, and uses the push-button cross as action triggers. The accumulator value should be displayed on the seven segment display in hexadecimal. the center button should be clear, and the four buttons should be ADD, SUBTRACT, AND and XOR.

    $27 (Avg Bid)
    $27 Avg Bid
    5 bids

    I require a working code in verilog/VHDL/C for an FIR Filter to be implemented on an Altera FPGA

    $112 (Avg Bid)
    $112 Avg Bid
    12 bids

    ----------------------------------------------------------------------------------------------------------------------------------------- The requirements : fix neural network *To build everything in Verilog, *The accuracy test by using the MNIST database and the training function *To find out the best accuracy it can be and the time take in training. *All of this should be printed in the ...

    $46 (Avg Bid)
    $46 Avg Bid
    4 bids

    I am currently using Altera DE2-115 FPGA board to configure it using Quartus 17 lite edition software and write the code in VHDL. We have to use QSYS, and NIOS II for Eclipse to write a program in C and to run the board. I am seeking some help in building this mini thing.

    $27 (Avg Bid)
    $27 Avg Bid
    2 bids

    We are seeking 1 FPGA Design Engineer for our new product development. FPGA Design Engineer Responsibilities: • Completing implementation in RTL • Ensuring robust and complete timing constraints • Optimizing FPGA code to balance performance, area, power, complexity and timing • Determining and executing development, integration, bring-up and test plans. • Working closely ...

    $37 / hr (Avg Bid)
    $37 / hr Avg Bid
    25 bids

    hello, I am looking for expert who build GL algorithm using VHDL. If you can do it, we will discuss in details.

    $37 (Avg Bid)
    $37 Avg Bid
    7 bids

    I would like to do project in human eye pupil tracking system for video sequence using Verilog in Xilinx spartan 6 FPGA. Here with attached my equirements Requirements: 1. Find the pupil center coordinates and radius for various eye's. 2. Coordinates should be constant intervals while tracking. 3. Only video sequence to be used.... Not for image. Kindly send me possibility of above …...

    $69 (Avg Bid)
    $69 Avg Bid
    2 bids

    i need a 8-bit comparator characterizing overdrive, to be implemented on FPGA, using Verilog also I need the constrains file

    $22 (Avg Bid)
    $22 Avg Bid
    9 bids

    Looking for implementation of a Ethernet Tester, generating and analyzing Ethernet traffic at 1G and 10G. More details on PM. J

    $12 / hr (Avg Bid)
    $12 / hr Avg Bid
    25 bids

    BCD adder vhdl code which detects an overflow using vivado

    $8 (Avg Bid)
    $8 Avg Bid
    6 bids

    Please read carefully. You need to fix my code. I will sent to you in messages my project. Here is project description: The brightness measurement with help of PMODALS sensor ([login to view URL] ) should be realized. For this purpose, the Basys 3 FPGA board should be used. Furthermore, an 8051 microcontroller IP core([login to view URL]) is to be used, which takes over the control. The result of ...

    $515 (Avg Bid)
    $515 Avg Bid
    13 bids

    Opal Kelly front panel, C++, Verilog, XEM6010. Must have experience with Opal Kelly front panel, since this project will be similar with the EVB100X-DEV. Same concept, but different sensor.

    $2248 (Avg Bid)
    $2248 Avg Bid
    19 bids

    first task will be to use the xtal oscillator board that I designed and that works, together with the FPGA to read the GPS data and then synchronise the 40 MHz Voltage Controlled Xtal oscillator to the 1 second pulse produced by the GPS. That is called a frequency loacked loop. We will talk about the details of that on Monday. I have attached the schematic for the PCB of the board you have. U3 is ...

    $336 (Avg Bid)
    $336 Avg Bid
    5 bids

    ----------------------------------------------------------------------------------------------------------------------------------------- The requirements : Build a deep neural network using some of approximate MAC UNIT, *To build everything in Verilog, *The accuracy test by using the MNIST database and the training function *To find out the best accuracy it can be and the time take in traini...

    $321 (Avg Bid)
    $321 Avg Bid
    10 bids

    Hi Rajagopal S., I noticed your profile and would like to offer you my project. We can discuss any details over chat. The brightness measurement with help of PMODALS sensor ([login to view URL] ) should be realized. For this purpose, the Basys 3 FPGA board should be used. Furthermore, an 8051 microcontroller IP core([login to view URL]) is to be used, which takes over the control. The result of t...

    $220 (Avg Bid)
    $220 Avg Bid
    1 bids

    ----------------------------------------------------------------------------------------------------------------------------------------- The requirements : Build a deep neural network using some of approximate MAC UNIT, *To build everything in Verilog, *The accuracy test by using the MNIST database and the training function *To find out the best accuracy it can be and the time take in traini...

    $174 (Avg Bid)
    $174 Avg Bid
    12 bids

    Provide VHDL code and testbench simulation for ECP5 Lattice device (Diamond Studio) to read HX711 sample ([login to view URL]) And store it in 32bit register

    $177 (Avg Bid)
    $177 Avg Bid
    6 bids

    Hi. I have a Terasic De1SoC and would like to learn how to use it. I am completely knew and have seen content from a similar project and interested on these topics About VLSI Advanced Digital System Design VHDL Verilog RTL Design FPGA Design Implementing various encryption and decrypt algorithms SystemVerilog VMM Methodology OVM Methodology UVM Methodology I have C programming background

    $33 / hr (Avg Bid)
    $33 / hr Avg Bid
    1 bids

    I need vhdl code for signal processing. I need 256 point fir filter and 4096 point fft. create bid, many experience in signal processing. chatting discussing in detail

    $160 (Avg Bid)
    $160 Avg Bid
    14 bids

    I need a sample code on DE-10 code for utilizing the FPGA-HPS bridge with more emphasis on hardware acceleration. (C ,VHDL prefferd /Verilog). I am trying to explore the functionality where I can write some data from HPS to the FPGA. let the FPGA process it and HPS read back the result. I need to see some processing happening in FPGA on request from HPS . IT could be as simple as AND impleme...

    $110 (Avg Bid)
    $110 Avg Bid
    6 bids

    Scope includes the programing (vhdl) for the measurement and of AC voltage, currents, Power (active, reactive and apparent power) and Power Factor in FPGA (Spartan-6). Interfacing ADC and sensors with FPGA for current and voltage measurements. It also includes the display of measured parameter on LED display which is inbuilt on board). This is the brief requirement, interested people may contact ...

    $103 (Avg Bid)
    $103 Avg Bid
    6 bids