i need to construct a location based services system model that preserve the privacy using auditing mechanisms and simulate and test the system
We are looking for an implementation of a FPGA SATA-to-SATA bridge. Design should be made in VHDL and be compatible to Xilinx Aritx-7 Series. The FPGA should receive SATA as a device (SATA device controller) and forward these information after processing to one or two SATA devices as SATA host (SATA host Controller).
We are a Australian based company in developmen...setup and amplified via Mosfets. Digital Data will be implemented on a Xilinx FPGA. Trapezoidal waveform needs to be written in VHDL so that circuit and Code simulation can be done in Tina software. An explanation of the VHDL code to be supplied so that code can be changed at any time in the future.
Hello, I am using a passive RFID setup and i am searching for security solutions. I saw two solutions either to implement a Semi-Randomized Access Control or a physical unclonable function. Does anyone have an idea of that? Note that i am using a small RFID reader that cannot be configured and encryption level 2 RFID cards. Is there a way to make the communication between the reader and the ID c...
I need a 3 - 4 page research on implementing tramway/cable cars in Beirut, Lebanon. Please Tackle: 1) Cost/benefit 2) Implementing (Infrastructure, jobs etc...) 3) Risks 4) Social Implications 5) Other Pros and Cons
The project is described in the uploaded file, however one can alter the project as long as keeping the equipments and the goal of the project intact
need to implement this template as a new website. [login to view URL]
...ability to extract and critically evaluate data for an unfamiliar digital design problem. • The application of appropriate design methods to the VHDL design. • The selection appropriate analysis tools, VHDL model abstraction levels and simulation test vectors. • Ability to implement your design solution on a commercially available digital Computer
I have a backend API server which has all the relevant endpoints. I also have some of the react app which contains the login page. I want to complete the login workflow and create a user profile
We are in the process of building up a marketplace, and has come to the payment. We are choosing to go with Stripe, and have an idea of how we want this to work, however we lack the inhouse experience to set this up properly. We have developers who can help with integration if needed Deliverables We need a working and fully automatic paymentflow that can handle grouped transactions. Please see...
I need a freelancer with experience on ubuntu softwares developpement and control. the needed work is to support and help solving errors, in order to boost my projet during the next 4 months, for approximateley 1h per week.
...already have this you can modify that but I need the code running on FPGA board after I download it to it. Description: You have to create the VHDL model for the 4-bit multiplier. You must also synthesize the VHDL model, download to FPGA and test your multiplier on the FPGA board. Use a push button on the DE10-Lite FPGA to provide the clk input to the
To stimulate a project-based evaluation approach using VHDL and write a report. More information is contained in the file. Projects need to be written in VHDL and run a simulation for the program using a board. I will need the VHDL code and simulation for the timing diagram.
I created this project and fini...created this project and finished the entire code ,but for some reason it is not giving me the correct outputs.I would like help to fix the issue by editing my code. using VHDL in vivado I was able to create successful circular cordic. but when I made my AXI full and run it in SDK, it did not give me the right answer
Input: A 2D-matrix A with m rows and n columns. Two parameters k1 and k2, where k1 and k2 are both positive integers. Output: (k1 × k2) co-clusters of the matrix A, where k1 is the number of partitions of the m rows and k2 is the number of partitions of the n columns. Main Variables: A non-negative integer k as the loop counter; A k1 × k2 matrix X with each entry a real number as the a...
...ability to extract and critically evaluate data for an unfamiliar digital design problem. The application of appropriate design methods to the VHDL design. The selection appropriate analysis tools, VHDL model abstraction levels and simulation test vectors. Ability to implement your design solution on a commercially available digital Computer Aided
Your job is to implement a skip-gram model in python with keras, detailed instructions with code are found enclosed in the document instructions.docx. Please read it carefully. You need good knowledge of python, keras and machine learning. The file that needs to be analysized ([login to view URL]) is enclosed.
I need to write a program in C/C++ implementing a hashtable.
Implementing a program able to resize an image by reducing the loss of information using the anti-alias technique type of super sampling antialiasing (SSAA or FSAA) and implementing a rendering micro engine, capable of creating a picture containing a line. These programs will be implemented using threaded APIs provided by the pthread library in C language
I need my website re-configured.I need you to design and build it.
I need an Android app. I would like it designed and built. Let's talk about this and the price.
...- language : VHDL - IDE : Quartus Prime Lite Edition - Simulations with ModelSim - mini-project : 0) implement a 1680x1050-60Hz mode VGA controller (operating @ 143Hz pixel clock via PLL) 1) store 280x280 8byte/pixel image to on-chip memory (M9k blocks) 2) read image from on-chip memory (using Altera/Intel's RAM-1Port vhdl IP) 3) output
I need to be able to use Google analytics and Facebook pixel with my website. These two items need to be implemented . I'd like in done in 24hrs if possible.
i have attached the document below. And i need this on 21st of october.
...have to be ported to VHDL and be integrated before programming the Xilinx V6 FPGA on the transmitter. Complete hardware and many of the software blocks in VHDL are already built by our team. The requirement is urgent. Entire work to be completed in 2 - 3 weeks. Any freelancer with experience in integrating system level codes in VHDL, basics of digital
Snake Game : 1.) Should run on Altera DE2 Board or on basy3 . 2.) Should Support VGA. 3.)Needed in a 3 days. skills:- verilog software:vivado i need this project in verilog ...: 1.) Should run on Altera DE2 Board or on basy3 . 2.) Should Support VGA. 3.)Needed in a 3 days. skills:- verilog software:vivado i need this project in verilog and not in VHDL
We require a Communication and Sales strategist to provide immediate and ongoing consultancy in the Guitar category. Must have 2018 experience and education in: - Creating a Communication and Sales strategy. - Facebook and Instagram audience engagement. - Amazon FBA. - Shopify dropshipping. This is an ongoing role that begins with Strategy and continues with implementation. Ideally you will ha...
I looking for an experienced person with good knowledge on machine learning(particularly SVMs) and MATLAB. Also, i would need the deliverable in one day
Implementing initial SEO and Creating AMP pages "'
Need to implement using Contrastive Divergence and PCD algorithms using MNIST data set