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    2,592 read data adc fpga jobs found, pricing in USD

    Need an expert in xilinx vivado Projects are based on digital systems on topics such as Multiplexers Flip flops registers Counters Clock dividers Please contact for project instructions and further details

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    I have my working model of neural network. I want to develop an accelerator on FPGA and show improvement in power.

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    ...Video Production Landscape Design Online Writing Financial Analysis Drafting Package Design User Experience Design Moving Swift Autodesk Inventor Tattoo Design Call Center FPGA Handyman Microsoft SQL Server Digital Marketing Wikipedia Zbrush Carpentry Book Artist Procurement Database Development Raspberry Pi Wix VB.NET Sketching Email Developer Network

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    We are looking for someone who is very good with high speed digital layouts. The application is an Ethernet to digital audio motherboard. A daughter card with an Zynq FPGA/processor will install on this motherboard, and the motherboard will install onto a DAC board. There is a development board for this daughter card already. So this motherboard will

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    The freelancer has to design an Analog Universal Input for an A/D converter, of minimum 16-bits resolution. This analog circuit must have the following features: - Programmable input: Pt100 RTD and thermocouples type J, K, T, E, N, R, S, B. - Two-wire loop powered 4-20 mA output - Voltage input of 0-10, 0-5VDC - Linearized output and cold junction compensation for thermocouples. - 2 or 3-wire Pt10...

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    Labview MyRIO2 3 days left
    VERIFIED

    ...in using MyRIO, MyRIO FPGA and MyRIO web services (Fig1 and 2). The project steps are explained as below: 1- The MyRIO should capture a signal (can be anything) with the sampling frequency of 5KHz. 2- Eleven (11) seconds of the signal must be captured. 3- I will provide you with two (2) MATLAB codes that must be run by MyRIO FPGA to analyse the captured

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    I work in the Electrical En...distance measuring program using verilog. I will be using Basys 3 ( FPGA) and an Ultrasonic sensor ( HC-SR04). The idea is to measure the gap between two vehicles. The sensor will be placed in the front of a toy car and used to measure the gap instantaneously and also save that data for later use ( average, mean,... etc).

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    I would like to discuss with freelancers having strong expertise in programming languages like VHDL, Verilog, Matlab, embedded C Please reach out to me. Engineering B.Tech. is must

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    This project’s goal is to record underwater sounds with a hydrophone and raspberry pi . Please read the attached document “An Autonomous Underwater Recorder Based on a Single Board [login to view URL]” inside the zip file to understand more about what we would like to accomplish. You need to be familiar with Electronics and Signal Analysis. This project consists

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    I need someone to modify the ccminer software. So it can communicate with FPGAs instead GPUs. It needs to work with both usb and pcie. I'm not asking for algorithm programming, I'm not asking for bitstreams. Just modifying the mining app ccminer so it works with FPGAs.

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    Hi guys, I've done a simple design to test the SRAM of Digilent Cmod A7 FPGA board. This is how it works: Using a terminal through UART, I send the input data and address to the SRAM. Then I send address where to read, and I get back the data previously written. Everything works OK except the controller. I need someone to review my design and fix

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    Hi, I have a Flash 6 bits ADC, would like to attempt to make a 12 bits ADC, can you help me to achieve it ?

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    coding of bitstreams, software licensing, imbedded commission

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    ...in using MyRIO, MyRIO FPGA and MyRIO web services (Fig1 and 2). The project steps are explained as below: 1- The MyRIO should capture a signal (can be anything) with the sampling frequency of 5KHz. 2- Eleven (11) seconds of the signal must be captured. 3- I will provide you with two (2) MATLAB codes that must be run by MyRIO FPGA to analyse the captured

    $142 (Avg Bid)
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    8 bids

    Any encryption code (AES/RSA) written in VHDL/Verilog in Quartus II for fpga board stratix IV. Please contact for more details.

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    Project target is to have a FPGA to communicate with two I2S codecs and to provide a SPI slave connection conveying the I2S data to and from a local MCU. Testing scripts and test timings for the Altera Quartus environment are required. For the proper testing of the project deliverables, test scripts and test timings need to be created and relevant

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    ...in using MyRIO, MyRIO FPGA and MyRIO web services (Fig1 and 2). The project steps are explained as below: 1- The MyRIO should capture a signal (can be anything) with the sampling frequency of 5KHz. 2- Eleven (11) seconds of the signal must be captured. 3- I will provide you with two (2) MATLAB codes that must be run by MyRIO FPGA to analyse the captured

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    ...They have to be moved to other pins so the pins are usable as TX and RX in the PIC19F1939. This should be set in the PIC. They have to be set up so. Finally, three new pins for ADC have to be set up. New PIC datasheet, PIC 16F1939: [login to view URL] Current PIC datasheet, PIC 16F1936: http://ww1.microchip.c

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    0-5V signal will be sampled and filtered by a 24 bit ADC(AD7768-1), the measurement will be read by an MCU(STM32F103C8) and transmitted to MAX3491AE to be converted into RS485. Project will have 4 milestones as follows: 1) Completion of the schematic 2) Completion of PCB drawing 3) PCB fabrication and basic function tests 4) FW development on the

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    I designed a PCB board that works with a Raspberry Pi. The Raspberry Pi uses i2c and Python code to communicate with components on the PCB board (e.g. DAC, ADC). I'd like the board to work with an Arduino as well as a Raspberry Pi. Hence, I'd like to have the Raspberry Pi Python code translated to C for Arduino

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    ...complete this project. They both have sample projects for HDMI in and HDMI out. What I'm trying to accomplish is have: 1) PC->HDMI->FPGA->HDMI->Monitor 2) PC->USB-> FPGA 3) The PC will send information to the FPGA and create an overlay on the monitor. This software on the PC could be coded in C++ or C. Example, DrawText(x, y, "Truck #19 ready f...

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    Require a freelancer to write a code in C language for Digital Weigh Balance using cs5460absz and 8051 (89S51/52) Microcontroller. Display on six- 7 Segments. Featu...small push buttons..2 buttons for selecting the count, for incrementing and decrementing the count and save that count value in eeprom..then with saved value we should compare adc value

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    We are looking for DSP Firmware Engineer who has specialized in algorithms' performance optimization for DSP/FPGA based on VLIW architecture.

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    I am looking to create hardware that will convert HDMI to NDI (Network Device Interface) I need both hardware and [login to view URL] is no set date when I need this by but w...HDMI to NDI (Network Device Interface) I need both hardware and [login to view URL] is no set date when I need this by but would like it soon. There is an sdk for the conversion by fpga.

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    ... The serdes circuit should take 16 16-bit data from one memory and transfer it to another memory serially. The design will have 2 parts. Following should be the functionality: Part 1 Data from a preset memory (16 locations of 8-bits each) is converted to a serial stream of data and sent out of the FPGA chip through a single pin... Part 2 ...The

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    I am building a tech blog about FPGA crypto mining. I need someone able to write tech articles, based on my request, about FPGA crypto mining. This is NOT something you can search on google and learn and write. Requirements: 1) You MUST have VERY GOOD knowledge about FPGAs 2) You MUST have VERY GOOD knowledge about crypto mining 3) You MUST be english/american

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    I have a DE1-SoC FPGA board. I need an image build with a Linux installation (doesn't really matter) and the linux-socfpga kernel; however, the device tree blob on the installation must recognize the onboard FPGA peripherals, especially the onboard ADC. The goal is to have a working Linux image file, which when burned to an SD card would load Linux

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    Read data of sensor on FPGA Xillinx. More details via messenger Freelancer.com with full requirements.

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    Front End VLSI Design engineer Part Time in Bangalore Looking for expert FPGA Design engineer with RTL Design [Verilog] Proven track record of designing, developing, prototyping, and testing high speed FPGA designs Experience in Verilog programming & experience with Xilinx devices and development tools Design Simulation experience [Modelsim] Candidate

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    Front End VLSI Design engineer Part Time in Bangalore Looking for expert FPGA Design engineer with RTL Design [Verilog] Proven track record of designing, developing, prototyping, and testing high speed FPGA designs Experience in Verilog programming & experience with Xilinx devices and development tools Design Simulation experience [Modelsim] Candidate

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    Gerber Design: Dimension of PCB : 140 mm X 100 mm Major components : Microchip control PIC18F family Display : 3.5" TFT display MICROCHIP LAN : ENC23j60 SPI FLASH Memory ...PCB : 140 mm X 100 mm Major components : Microchip control PIC18F family Display : 3.5" TFT display MICROCHIP LAN : ENC23j60 SPI FLASH Memory USB FTDI series Maxim series of ADC

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    Needs to hire 2 Freelancers We are looking for designer to design Video object tracking : 1- CPU, CUDA based or FPGA accelerated algorithm . 2- Multi-target Detection/ tracking . 3- Moving object detection . 4- High accuracy , auto scaling , occlusion recovering . 5- fixed camera or moving camera. 6- Image Stabilization . 7- Move on Move tracking

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    ...STM32F4Cube HAL library and STM32CubeMX configurator. Target STM32F407VE MCU. Peripherals used: USB OTG FS port, Waveform DAC output pin, waveform ADC input pin to input waveform for measuring and 4 ADC input pins for parameters settings from pots. Generator : 0 - 3.3V Amplitude both square and sawtooth waveforms positive in relation to GND . No offset

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    We are looking for someone with engineering background, preferably knowledge in FPGA related stuff to translate some tehnical documents. Google translate is not acceptable.

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    Looking for a mentor in advanced FPGA development using Altera Max 10 FPGA board specifically.

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    1. Identify a good value and properly sized CPLD/FPGA and toolset (toolset needs to be relatively easy to configure) to accommodate the required functionality. 2. Develop the CPLD/FPGA code. The device needs to take as inputs a set of states (from a microcontroller so either as an I2C command or as a 3 digital input code, along with 3 digital inputs

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    i want atmega8a programmer for adc and timer programming . please if any one contact me

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    I need a network of thermostats that send data over Power Line Communication to a router where it is then sent over Ethernet and stored on a server. I will need to have software to access and display the data in graph form. There are other components that I need that are not so detailed. I need consulting for the design and components to use for both

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    ...square or rectangular with maximum dimensions of 9.5 cm x 9.5 cm. The PCB should hold 5 of the following boards: [login to view URL] There should be some minimal interconnection between the 5 boards (more details to be provided). The USB ports on each of the boards will be used only for programming

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    ...infinite scroll since a few year, but since today we have switched to SSL, now the infinite scroll raise an error because of SSL to see the error open [login to view URL] then and scroll down, you will see it is not loading the next pages Note : It is not possible to change the HTML code on the server but i can

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    I have a unusual ADC/DAC/GPIO hybrid device connected to a Microcontroller via SPI. I need a driver for the ADC & DAC as well as digital IO from the device

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    Development of an embedded C driver for an ADC/DAC IC connected via SPI

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    I am looking for Xilinx SDx OpenCL expert, who can convert github miner project into FPGA hex file in Xilinx SDx. Don't bid if you do not have experience.

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    Reading of sensor via PMOD on FPGA Xillinx. More details via messenger Freelancer.com with full requirements.

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    I need to implement the project using fully parallel interleaver and QPP interleaver in FPGA platform. the language used for coding is Verilog and it is synthesized in Xilinx.

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    ...for 1 hour work max! We have the attached 128*128 image, i just need some fixes and to run it and produce the new image after the median filter we pass it through microblaze FPGA in the c program. I specifucally want: 1. instead of arrays i want the resulting image to come off like a txt if possible 2. i want inside the code to include the part we

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    Hello everybody, I want a simple median filter in c embedded through a micriblaze fFPGA. I have some part of the code ready. i need it in 1 hour. If you got it lets talk :)

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    High frequency electronics: signal, sensors and electronic interface to ADC

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    Hello dear, I have this image table i produced through c embedded median filter code. i want this table to be passed through an FPGA microblaze and then deliver the new image. Thats all. interested? it is for today

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    Hello dear, I have this image table i produced through c embedded median filter code. i want this table to be passed through an FPGA microblaze and then deliver the new image. Thats all. interested? it is for today

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