Read data adc fpga jobs

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    2,499 read data adc fpga jobs found, pricing in USD
    FPGA zynq ultrascale+ project 6 days left
    VERIFIED

    The project is demo for building a battery handles system based on fpga. The platform is zynq ultrascale+ with ultrazed board. the system is about basic image processing and involves display and image sensor The right freelancer is the one that has experience in this area

    $154 (Avg Bid)
    $154 Avg Bid
    3 bids
    FPGA TCPIP implementation 6 days left
    VERIFIED

    FPGA TCPIP implementation using Verilog

    $21 / hr (Avg Bid)
    $21 / hr Avg Bid
    9 bids

    We have an almost complete aut...cRIO We need someone to make minor modifications and possibly offer ongoing support in the future. You should be familiar with LabVIEW coding for cRIO including the internal FPGA We are based just south of Milton Keynes, if this is of interest please call [Removed by Freelancer.com Admin] to discuss further details

    $39 / hr (Avg Bid)
    Local
    $39 / hr Avg Bid
    1 bids

    Hello I want to interface radio module CC110L with PIC32 micro controller. Also PIC32 take value from current sensor and Using ADC I need to convert value in digit and send it over radio module.

    $139 (Avg Bid)
    $139 Avg Bid
    9 bids

    ...driver to manage the screen and the sc card. WIth 1 button: On/Off and a switch : Flash. The ESP8266 has to be also in charge of measuring the remaining battery using the ADC. If you think you can do it, start the bidding proposal with "ESP8266TFT". If you need more info or pictures of the existing (but discontinued hardware), do not hesitate to

    $1221 (Avg Bid)
    $1221 Avg Bid
    31 bids

    We need to connect Sony imaging sensors (not industrial ones) to Raspberry PI, using Lattice FPGA. We are looking for expert designers, with their own design tools. We only need the design of the electronics, so no physical tests, and no components available. The design will be checked for compliance before final payment. Possible further cooperation

    $372 (Avg Bid)
    $372 Avg Bid
    13 bids

    I am looking for people who join my team, we are working with new FPGA miner which are highly efficient that everybody can profit. basically it is a binary salery plan with a crypto mining product. So you have the chance to start your own business in the field or you work for me as a freelancer and get for every customer that signs up a reward of 25

    $35 - $292
    $35 - $292
    0 bids

    ...looking for an experienced PCB designer at an affordable rate. I need help creating modules based on references designs of DAC/ADC chips. I'm working on an audio based project and I've had much success with inexpensive DAC/ADC modules found on ebay. I've tested PCM5102A and PCM1808. However, the parts that I actually want to use don't have a simple module

    $1220 (Avg Bid)
    $1220 Avg Bid
    25 bids
    Firmware creation IoT Device 2 days left
    VERIFIED

    Must have experience with BG96, ([login to view URL]) BG96- Intended Application • Collect and Transmit data via LTE CATM1 connection on predefined intervals. • Control the Wifi power domain. • Control internal GNSS receiver . • Control network, power and GNSS LEDS. SAM D 20 (This is a Core M0+ 32 - bit 48MHz Arm based Amtel processor)

    $1500 - $3000
    Sealed NDA
    $1500 - $3000
    8 bids

    Create a custom Fritzing Part for the Omega2 ADC Expansion PCB. The focus is on the Breadboard model - it must have all connectors correctly placed on a graphic of the PCB. It does not have to include all of the details of the schematic - can be treated as a blackbox. Adobe Illustrator Diagram of PCB will be provided.

    $28 (Avg Bid)
    $28 Avg Bid
    5 bids

    ...Configuration PHP • Data SQL • Configuration SQL • Configuration Apache The location in dropbox where to store the backup will be shared ------------------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------------------ Remove the data and import

    $179 (Avg Bid)
    $179 Avg Bid
    23 bids

    I need the design of PCBA/FPGA (Gerber file and BOM)

    $691 (Avg Bid)
    $691 Avg Bid
    25 bids

    Following the sa...my categories to put inside my navigation menu on my ecommerce. The categories topics are: 1: Microcontrolers, Modules 2: Arduino, Raspberry pi, Tensilica, STM32, ATTINY, FPGA 3: Breadboard, Power Source, Network, Sensors, Modules, Relay (actuators), LED, CNC, Motor, USB, Memory, Infra-RED, Radio Frequency, Temperature, ASIC Chips

    $117 (Avg Bid)
    $117 Avg Bid
    28 bids

    I am a cryptocurrency miner, and I would like to buy a larger number of FPGA cards to mine with, specifically the Xilinx VCU1525 FPGA Card. I need someone to Program the card to mine a number of specific algorithms. Preferably the dagger hashimoto, Neoscrypt, Equihash algorithms, I need a quote on how much this will cost.

    $16947 (Avg Bid)
    $16947 Avg Bid
    11 bids

    i need vhdl project for fpga bord i need skeleton and can move

    $24 (Avg Bid)
    $24 Avg Bid
    14 bids

    Need help developing a face detection system with the DE2-115 board and OV7670. I already developed the code for the face detection but in MatLab.

    $220 (Avg Bid)
    $220 Avg Bid
    14 bids

    We are seeking a consultant to migrate several Xilinx K7, K7 Ultra and/or V7 FPGA-based DSP Apps (developed using Vivado) to OpenCL so they can run on Intel, AMD/ATI, NVIDIA and mobile GPUs. Ideally, the OpenCL acceleration would fit into our existing Windows / LabVIEW framework so we could have compatibility with our current set of apps.

    $9212 (Avg Bid)
    $9212 Avg Bid
    11 bids

    we sell our customers some IP (named CoaXPress FPGA IP). the price is one time however there is first year of maintenance and warranty provided free of cost with purchasing. Following years of maintenance are optional (not mandatory). However, if its not purchased, then customers will net get updates or support of their product. In case of requirement

    $125 (Avg Bid)
    $125 Avg Bid
    31 bids

    I have a very simple FPGA project to test the Intel Arria 10 SoC Dev kit (DK-SOC-10AS066S-A) with Quartus Prime Pro 18.0 as follows. The main code instantiates an IOPLL Intel FPGA IP core to reduce the input board clock from 100 MHz down to 2 MHz which drives a Unique Chip ID core. It also blinks an LED on the board. You can download the project here:

    $106 (Avg Bid)
    $106 Avg Bid
    5 bids

    i want to realize the transfer function on fpga so any one with knowledge of vhdl and quartus tool can bid Thank you

    $37 (Avg Bid)
    $37 Avg Bid
    6 bids

    Designing an FPGA board for "5CEFA9F27I7N altera cyclone v". A board that include 4 ram sockets, full-size DIMM (desktop pc ram), DDR3. And programming an FPGA crypto miner for this board.

    $3000 - $5000
    $3000 - $5000
    0 bids

    Program counter to be simulated with testbench and implemented on De0-cv fpga. Please see file for exact specificiations and criteria.

    $131 (Avg Bid)
    $131 Avg Bid
    19 bids

    ...the alarm should be reset to 0. • Timing / Clock generation o The alarm clock should be accurate. Divide down the 50MHz clock at PIN_M9 as necessary to achieve this (on the FPGA). You are not expected to verify that your clock keeps good time. For all Frequency dividers use a 50% duty cycle. This should be constructed similar to a counter. 50% duty

    $122 (Avg Bid)
    $122 Avg Bid
    13 bids

    ...Configuration PHP • Data SQL • Configuration SQL • Configuration Apache The location in dropbox where to store the backup will be shared ------------------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------------------ Remove the data and import

    $174 (Avg Bid)
    $174 Avg Bid
    12 bids

    ...as a receiver. I need someone who can write a code on Atmel XMEGA A1U to do the following : Transmit mode: send data received from Arduino (SPI port 1) to the transmitter RF micro-controllers through (SPI port 2) Receive mode: receive data from transmitter RF micro-controllers through (SPI port 3) and pass it through (SPI port 1) to Arduino P.S:

    $482 (Avg Bid)
    $482 Avg Bid
    22 bids

    I am looking at an FPGA project using xilinx the project has very specific functions that i do not have the skills required to implement it myself sadly so i hope you can help with that. The project is for a crypto miner that can mine using the cryptonote algorithm Variant 1 i have chosen a model of FPGA as it has 100k logic gates and good memory

    $366 (Avg Bid)
    $366 Avg Bid
    9 bids

    Hello I am doing a small project and am on the lookout for FPGA and software developer to work on a prototype. We are creating a product that is very similar to SmallHD monitors where we take a HDMI signal, process that signal and display that video signal plus overlays such as histograms, false colour and 3D LUTS. What we require for this prototype

    $830 (Avg Bid)
    $830 Avg Bid
    6 bids

    I am in need of an FPGA programmer for a Xilinix FPGA which I plan to mine cryptocurrencies with. If you have knowledge in this field I hope to hear from you.

    $607 (Avg Bid)
    $607 Avg Bid
    12 bids

    ...bid MY FPGA board is DEO nano SOC CYCLONE 5 1. reading an anolog signal (adc is available on board )ltc2308 is the adc which is available on fpga a board 2. realization of PID controller on FPGA 3. realization of process module on fpga (simple equation as to be realized here i.e PT1 transfer function) 4. output of pid controller should be read ...

    $366 (Avg Bid)
    $366 Avg Bid
    2 bids

    ...bid MY FPGA board is DEO nano SOC CYCLONE 5 1. reading an anolog signal (adc is available on board )ltc2308 is the adc which is available on fpga a board 2. realization of PID controller on FPGA 3. realization of process module on fpga (simple equation as to be realized here i.e PT1 transfer function) 4. output of pid controller should be read ...

    $58 - $140 / hr
    $58 - $140 / hr
    0 bids

    A card with a 16x4 LCD screen that sends data from the current sensor using MQTT and has remote relay control. There will be 3 internet connection protocols. (it will be 2 protocol WIFI and GPRS) - ENC28J60 will be used as a wired internet chip. - wireless ESP8266 or ESP8285 antenna chip can be used. (It can also be in the form of a ready-made module

    $220 (Avg Bid)
    $220 Avg Bid
    10 bids
    $16 / hr Avg Bid
    12 bids

    Hi, I want to implement a CNN in a Xilinx FPGA using Caffe or Tensorflow.

    $247 (Avg Bid)
    $247 Avg Bid
    2 bids

    ...Can Bus USB Device (Vcom) Wake up and sleep on interruption Start your message with the text Truck Project PCB so I know you read the whole description 2 x UART comm 6 x GPIO control 2 x GPIO read 5 ADC read 2 x User button read Control 0.96" OLED I2C LCD (write code considering special characters, not only the libraries available) Navigation menu using

    $140 (Avg Bid)
    $140 Avg Bid
    10 bids

    Hello, I have made a SAR 8 bits binairy coded ADC using method of 2 steps Successive Approximation, but it is a bit buggy. I need very experienced engineer in this field, otherwise it would just be loosing time. The simulation must be done in Cadence Virtuoso 6.x Thanks !

    $40 (Avg Bid)
    $40 Avg Bid
    2 bids

    Need someone to do circuit design for an FPGA board. The board is being made from scratch. All we have so far is the FPGA chip.

    $250 - $750
    Sealed
    $250 - $750
    7 bids

    Develop a musical bell that will play a selected and programmed song in the FPGA.

    $86 (Avg Bid)
    $86 Avg Bid
    4 bids

    ...DE1-SoC developmental board and I need a template project which allows me to transfer about 2kB of settings from the HPS side to the FPGA side. I want to use C on the HPS side to set 2048x 8-bit values which the FPGA can use to synthesize an arbitrary waveform in real-time. The memory can be SDRAM or any other suitable options available on the DE1-SoC

    $139 (Avg Bid)
    $139 Avg Bid
    7 bids

    control a sensorless bldc motor using fpga

    $19 / hr (Avg Bid)
    $19 / hr Avg Bid
    15 bids

    Mining Mining Mining Mining Mining Mining

    $594 (Avg Bid)
    $594 Avg Bid
    4 bids

    ...#define MOTOR_START_HALF_MS 40 /*! brief Timeout to wait for lock-pin to change from output to input (in microseconds) */ #define LOCK_PIN_CHANGE_TIMEOUT 10 /*! ADC to measure voltage on VCC */ #define MY_ADC (&ADCA) static volatile bool_t adc_running = false; static volatile bool_t adc_vcc_low = false; /*! brief This variable is set

    $591 (Avg Bid)
    $591 Avg Bid
    9 bids

    I need to design and simulate a typical telecommunication receiver system operating in Ku band(14.25 to 14.5 ...to design and simulate a typical telecommunication receiver system operating in Ku band(14.25 to 14.5 Ghz) consisting of Bandpass filter,Low ,noise amplifier,mixer,IF filter,adc and signal processor..with modulated and unmodulated signals.

    $126 (Avg Bid)
    $126 Avg Bid
    11 bids

    I need to design and simulate a typical telecommunication receiver system operating in Ku band(14.25 to 14.5 ...to design and simulate a typical telecommunication receiver system operating in Ku band(14.25 to 14.5 Ghz) consisting of Bandpass filter,Low ,noise amplifier,mixer,IF filter,adc and signal processor..with modulated and unmodulated signals.

    $189 (Avg Bid)
    $189 Avg Bid
    8 bids

    Looking for a embedded Linux developer/engineer for developing a driver for an iMX6 module on a custom board for capturing 16-bit greyscale video supplied by an FPGA through the camera sensor interface on the IPU of the microprocessor. Must have previous experience with IPU drivers and camera interfacing, as well as driver development for embedded Linux

    $28 / hr (Avg Bid)
    $28 / hr Avg Bid
    6 bids

    We are looking for a FPGA programmer, to build a mining software for Xilinx Virtex UltraScale+ FPGA VCU1525.

    $9413 (Avg Bid)
    $9413 Avg Bid
    14 bids

    i am FPGA fan and , I try to setup connection between fpga device ( NetFPGA-1G-CML Kintex-7 ) and local computer . My main objective : simple comunication over ethernet cable . I have already done hardware design (in vivado) - microblaze core + TEMAC ([login to view URL]), which is verifed and works

    $61 (Avg Bid)
    $61 Avg Bid
    2 bids

    ...with are sent to an amplifier (hence 6 amplifiers circuits). The output of the 6 amplifiers will go into 3 dual ADC's. The ADC will then send signal to connectors will an FPGA card will plug into. There is a signal from the FPGA that is sent to a DAC. I am basically designing a IO carrier board based on the ZED board (see attached) I can only work

    $3505 (Avg Bid)
    $3505 Avg Bid
    6 bids

    1. Create a top level VHDL file for the project. VHDL code should be well formatted and commented. 2. Add two instantiations of a sync counter to the top level that are customized for the horizontal and vertical sync signals 3. Adapt the tesbench from homework 2 to simulate the top level file. Simulations should be annotated to depict events important to the operation of the design

    $77 (Avg Bid)
    $77 Avg Bid
    6 bids

    Hi Iqra Software .., I noticed your profile and would like to offer you my project. We can discuss any details over chat. How many of your team members are exp...Software .., I noticed your profile and would like to offer you my project. We can discuss any details over chat. How many of your team members are experienced with Verilog FPGA programing?

    $42 / hr (Avg Bid)
    $42 / hr Avg Bid
    1 bids