Hello, I need the expert for my job. Details will be shared with winning bidder. please bid only if you have the experience. i have more than 5 to 6 jobs if this goes well. Thanks,
...gather, analyse and calculate the data is in semi automated mode and takes approximately 10 minutes which we used to reduce by automating the process. with the help of image processing, segmentation, deep learning, AI and other such techniques we wish to automate it but by any other method if you are able to get the automation done there is no compulsion
Synchronous control of 8 stepping motors with calculation of a trajectory of linear motion and circular motion with constant acceleration for CNC machine. SystemVerilog, FPGA Altera (IntelFPGA)
I want to perform 4 main steps on audio recording dataset (I will send you zip file which contain 97 files under 10 classes): 1- Applying Short-term Fourier transfer (STFT) for each recording. 2- Segmentation using Harma method. 3- Extract features from audio files: A. Time-domain: - Zero crossing rate (ZCR) - Short-time energy
Hi Muhammad Y., I noticed your profile and would like to talk to you about a job I need. I will be launching a kickstarter campaign in September and I am looking for some help for data and marketing. Can you get in touch with me? Thanks!
This thesis offers an extensive assessment of “space-time adaptive processing” (STAP and knowledge-aided STAP (KA STAP) for airborne radar. The topic is handles from both theoretical and intuitive contexts. A main prerequisite of space-time adaptive processing is information of the spectral features under the scenario of interference. Nonetheless, these
I need someone who is expert in academic writing and EE engineering communication and radar field and also embedded systems FPGA, the page's number will be around 50, and the topic and results and design are ready just need to be written.
Credit Card Processing Gateway Required with implementation for [url removed, login to view] Business is based in Pakistan, and providing Gold, Silver, Crude Oil, Currencies , Stocks Technical analysis worldwide.
Error Correction Blocks Configuration (Viterbi+Reed Solomon) on an ARTIX7-200T FPGA supporting 200 Mbps is needed. The bidder must use open source or free Viterbi decoders-Reed Solomon en/decoders-(De)Interleavers-Pseudorandom number generators (PRBS). The Viterbi Decoder must be parameterizable (K=7, 1/2,3/4,7/8 puncturing etc.) and must support