I need a project to be completed. It consists of four tasks involving S-R Latch, S-R Latch with enable, D-Latch, and Positive Edge Triggered D Flip-Flop implemented using VHDL (preferably also using Xilinx ISE Design Suite) and a report accompanying it as well. I am attaching the project guidelines and an example of what I am looking for in the report
Hi Ahmed. I have an working Calculator in VHDL with simple operations. it was created in ISE. It works but it must be optimized. I also need a small documentation. I need it for nexys 4. So do you are interested on this project?
...Asterisk PBX through a cellphone running android. In this case, Android phone will be acting as a GSM Gateway for Asterisk. The application working in APK format Full source code Simple manual for compiling and generating the application from source Features : -Route call from SIP to GSM -Convert audio from/to SIP and GSM networks -Able to run
The main aim of he project is to develope, design and implementation of IEC 18000-63 Type C protocol( Gen 2 EPC protocol) controller to establish communication between a UHF-RFID tag and RFID-Reader. The Implementation platform is VHDL and for verification of the protocol controller an appropriate test bench should be developed. Moreover, the
I need you to do pipelining for the MIPS-RISC (5 stage) Processor. I will gi...need you to do pipelining for the MIPS-RISC (5 stage) Processor. I will give you the MIPS processor code, all you need to do is pipelining. I will upload the file once go through it. If you are interested, I will send you the code and question for which code has written.”
design and implementation of a MIPS CPU with Multi cycle Data path using the VHDL language
Design a coprocessor that finds square of a floating-point value (x2), performs floatingpoint addition, performs floating-point subtraction, performs floating-point multiplication, counts the number of characters in a word, and compares two words. Implement the design on a SoC (System on a Chip) using XPS and SDK tools of Xilinx.