I am stuck with incomplete website which needs to be completed as quick as possible there are some page designing work, OTP features needs to be added and also there are certain bugs which needs to be fixed. Need skillful person for this one and timeline is fixed. All requirement details are attached in file please look at the file first then post your bid We need this minor project to ge...
We are looking for designer to design Video object tracking : 1- FPGA based platform . 2- ANalog and Digital video source . 3- Cross correlation . 4- Centroid . 5- Edge . 6- Multitarget Detection . 7- Moving Target Indicator . 8- Image Stabilization . 9- Move on Move tracking . 10- Low latency .
I have engage a email blasting service that needs to verify certain domain information see attached picture and I do not know how to do it, they have supplied and video to instruct someone how to set up the back end; // Please review below information from a blasting company named; [url removed, login to view] ================================================== From: Arik (Support staff) Hel...
Project goal...pins, and various X8/X16 NAND memory. The chosen coder can test using any MCU they are familiar with. Please note: I am only going to choose a developer who previous CPLD/FPGA experience. So if you place a bid, please read the project's entire description and post what previous expierence you have and with what type of parts/devices.
our in house built 3D printer needs to be verified that the electrical components are correct. as well as design the electronics blueprints for the machine. we are open to suggestions for new components.
...Channelizer, which is part of GnuRadio for this purpose. I know that such operations (multiplication, working with vectors and floating-point numbers) fit well on gpgpu and fpga, which means that one single device can potentially cope with this task (as evidenced, for example, by this document [url removed, login to view]
...application to generate the verilog file(.v) for XGMII 32 bit data and control path using pcap files. The first 8 byte of the first Ethernet frame in the pcap will be used for verilog generation. 1. I will give the pcap file , you will just take the first 8 bytes( 64 bits) of the pcap 2. Programmer will write the verilog to send the data to XGMII
EMV described in a protocol description language like AnB, where the various claims of interest can be encoded and validated. I want EMV VISA card (Kernel-3) payment steps between card and terminal to be simulated in AnB language. Also communication between card issuer and Terminal to be presented in AnB.
This project is related to design a system which is having a camera to take the image process it through the FPGA and display the original image with the location of faces in that image on an VGA screen.
I need a US based (ONLY) CPA or Attorney to validate my company for issuance of an extended validation SSL certificate. *** Only bid if you are a registered CPA or an Attorney in the U.S.A I attached the sample Accountant Letter Template and Attorney template. I need the required forms provided to be signed in a PDF format
...need a modification to an Ettus USRP SDR FPGA code. We have a working system and reference for a 1 TX and 1 RX system, using half of the USRP1, including the source files for the FPGA code and corresponding c library. We have working FGPA code for a 2 TX and 2 RX system, and but need about 15 lines of verilog code ported from the 1 TX and 1 RX system
The purpose of the Pattern Generator is to generate video stream with specific image for test purpose of backend device. Design in VHDL Only experienced freelancers with positive record See attached document for more information Please contact me for questions
The purpose of the switch is to switch video stream of Altera's VIP protocol from any input to any output. Each output can receive only one stream at a time. One input can be broadcasted to multiple outputs. Detailed requirements document attached. Only experienced freelancers with reviews