Vhdl verilog outsourcing jobs

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    4,436 vhdl verilog outsourcing jobs found, pricing in USD

    We want to contract a Sales Representative/consultant based in The United Kingdom to perform the required responsibilities and activities of direct sales in the Uni...perform the required responsibilities and activities of direct sales in the United Kingdom market and possibly other related countries. Our company works in the field of ICT outsourcing.

    $5000 - $10000
    $5000 - $10000
    0 bids

    Board : Terasic DE10-Lite MAX10 10M50DAF484C7G - 2 push buttons - 10 switches - 6 7-segments - 1 SDRAM module (ISSI IS4216320D) - see [url removed, login to view] for more details about the board Software tool : Altera / Intel Quartus Prime Lite 16.1 Project : create a small, minimalistic, Quartus project to illustrate the use of PLL ...

    $166 (Avg Bid)
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    1 bids
    multiplier 5 days left

    1. Design a multiplier circuit (using both combinational...2. Validate the functionality of your circuit with the following operands pairs: (3,6), (0, 9), (15, 15), and (7,13) 3. Deliverables: § Printout of your all project VHDL code file(s), the force command(s), both RTL top level and technology schematic view(s), and output waveform(s).

    $50 (Avg Bid)
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    4 bids
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    I have Computer engineering project to design Single Core ad Single Bus CPU, to built in Verilog HDL

    $140 (Avg Bid)
    $140 Avg Bid
    15 bids

    would like to get the implementation of given ieee paper using verilog/vhdl within 15 days

    $124 (Avg Bid)
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    4 bids
    200418_Verilog 5 days left
    VERIFIED

    All code is written/run on the Quartus Prime version 16 environment =========================================== You have to know Verilog. Please bid only if you know Verilog perfectly Deadline: 72 hours

    $50 - $80
    Sealed
    $50 - $80
    4 bids

    would like to get the implementation of given ieee paper using verilog/vhdl within 15 days

    $388 (Avg Bid)
    $388 Avg Bid
    6 bids

    Bit stuffing is the process of inserting non-information bits into data to break up bit patterns to affect the synchronous transmission of information. For a serial sequence 10111110; a stuff bit '0' should be added after every 5 consecutive 1's and vice versa when there are consecutive 0's

    $31 (Avg Bid)
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    9 bids

    Hi jeweljitu, I noticed your profile and would like to offer you my project. We can discuss any details over chat.

    $70 / hr (Avg Bid)
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    1 bids

    Tcp sending on FPGA using verilog xgmii xilinx vivado

    $377 (Avg Bid)
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    5 bids

    This is an FPGA/Verilog project to send some TCP packets over 10g SFP+ network to a tcp server.

    $465 (Avg Bid)
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    4 bids

    Looking for an experienced person that understands computer architecture and VHDL language to complete this task. The project will require you to create simulation files of each task that's asked in the attached document to verify it works properly. The code needs to be neat and commented in a way that explains what is happening in the code.

    $178 (Avg Bid)
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    8 bids

    I want to do a VHDL project on ModelSim, all what you need will be in the attached document, i will need a report for the whole project ( explaining every file in the project and what it does ). I want phase 1 ( Design ) ASAP and the rest of the project within a week ( Maximum 10 days ). Please read the document carefully and if you have any questions

    $153 (Avg Bid)
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    11 bids

    more details will be given in the chat

    $24 (Avg Bid)
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    15 bids

    traffic light controller with priority for emergency vehicles ( Police, Ambulance and firefighters ), I need a state diagram, a working verilog description of the design ( the simulation only) and discussing the results of the simulator (showing the waveform of the simulation)

    $77 (Avg Bid)
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    1 bids
    expert in vivado vhdl needed 2 days left
    VERIFIED

    expert in vivado and vhdl needed asap

    $25 (Avg Bid)
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    8 bids

    I am currently working on peak detector using VHDL entry (Modelsim and Xilinx), to design logic design in FPGAs to fulfill my free time. There are two parts, which are command processor and data processor. However, I have completed the data processor part, so only command processor left and I have no idea how to complete it. I plan to accomplish this

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    Hello, The idea is very simple .. I am aiming to start a web programming and digital marketing company and I am searching for outsourcing personnel or companies whom I can trust and rely on them in a long term relationship My role would be making all the necessary marketing and sales then contracting and gathering all required data for you, then your

    $42 (Avg Bid)
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    10 bids

    Hi Hightech Outsourcing BD, I noticed your profile and would like to offer you my project. We can discuss any details over chat.

    $85 (Avg Bid)
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    1 bids