Verilog / VHDL Jobs and Contests

Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Hire Verilog / VHDL Designers on Freelancer
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Project/Contest Description Bids/Entries Skills Started Ends Price (USD)
Implement I2C controlled 20 in 20 out switch Need to implement a 20 in and 20 out switch on an FPGA with slave I2C port. This device will be controlled by a master via 400kHz I2C. In & out Signals will be 3.3V and < 50kHz range. Please recommend a device to put it on. 4 Verilog / VHDL, FPGA Aug 30, 2016 Today6d 15h $235
Build a Site for ADS & Landing Pages finding Must be super like adplexity{dot}com 8 Verilog / VHDL, C++ Programming, Haskell, Assembly, Lisp Aug 27, 2016 Aug 27, 20163d 18h $1045
system verilog vmm uvm expert looking for some help converting vmm env into uvm 5 Verilog / VHDL Aug 26, 2016 Aug 26, 20162d 10h $73
Project for KarimRagab 7 C Programming, Verilog / VHDL, Algorithm, Machine Learning, C++ Programming Aug 26, 2016 Aug 26, 20162d 7h $61
Image steganography implemented on fpga using verilog Data Hiding Using Verilog 8 Project Management, Engineering, Verilog / VHDL, Electrical Engineering, Embedded Software Aug 24, 2016 Aug 24, 201620h 55m $1159
Image steganography implemented on fpga using verilog steganography using vhdl on fpga 6 Project Management, Engineering, Verilog / VHDL, Electrical Engineering, Embedded Software Aug 24, 2016 Aug 24, 201615h 51m $679
Write some Software Project consists of FPGA which captures data on a main serial bus (SB1) and sends to an ARM controller running WinCE7. There is also redundant serial line (SB2) on which the same data is coming. If the main line does not receive data within 'x' seconds, data should be captured from redundant line. 'x' should be kept as variable which will be modified according to the requireme... 4 Verilog / VHDL, FPGA Aug 24, 2016 Aug 24, 20167h 42m $428
Need PLC simulation and high quality writeup Using PLC Programming to control stepper motor ( servo motor) for cutting and drilling. Or using simulink to do that. Write a PLC Language for stepper motor to do cutting edge and drilling. Or use any programme to do that. This is for CNC Programming . I want just to do 1- End of Project Report Plan( 5 pages written by IEEE style Journal paper) 2- Simulation to this project to be demonstrated at... 7 Electronics, Matlab and Mathematica, Verilog / VHDL, PLC & SCADA, Electrical Engineering Aug 22, 2016 Aug 22, 2016Ended $179
Need PLC simulation and high quality writeup Using PLC Programming to control stepper motor ( servo motor) for cutting and drilling. Or using simulink to do that. Write a PLC Language for stepper motor to do cutting edge and drilling. Or use any programme to do that. This is for CNC Programming . I want just to do 1- End of Project Report Plan( 5 pages written by IEEE style Journal paper) 2- Simulation to this project to be demonstrated at... 4 Electronics, Matlab and Mathematica, Verilog / VHDL, PLC & SCADA, Electrical Engineering Aug 22, 2016 Aug 22, 2016Ended $25
Need Solarflare FDK expert -- 3 7 PHP, C Programming, Verilog / VHDL, Software Architecture, FPGA Aug 19, 2016 Aug 19, 2016Ended $3479
Need Solarflare FDK expert . Job description: Solarflare FDK provided a complete "Tick to trade" example. It only works on 1 10G port. The FPGA card will keep receiving UDP packets from a server. When it received a interested packet, it sends out a TCP packet back to the server. The detail of this sample is on page 111 of the attached user guide. Modification: 1. 4 port mode We need to modify thi... 2 PHP, C Programming, Verilog / VHDL, Software Architecture, FPGA Aug 19, 2016 Aug 19, 2016Ended $3229
Urgent Need of FPGA engineer Device: Solarflare AOE card (SFA7942Q) description link :http://www.solarflare.com/applicationonload-engine FPGA board: Altera Stratix V A7 Job description: Solarflare FDK provided a complete "Tick to trade" example. It only works on 1 10G port. The FPGA card will keep receiving UDP packets from a server. When it received a interested packet, it sends out a TCP packet back to... 5 C Programming, Verilog / VHDL, Software Architecture, FPGA Aug 18, 2016 Aug 18, 2016Ended -
FFT implementation on spartan 3e 16 Verilog / VHDL, FPGA Aug 18, 2016 Aug 18, 2016Ended $252
Freelance FPGA engineer (Project base) Device: Solarflare AOE card (SFA7942Q) description link :http://www.solarflare.com/applicationonload-engine FPGA board: Altera Stratix V A7 Job description: Solarflare FDK provided a complete "Tick to trade" example. It only works on 1 10G port. The FPGA card will keep receiving UDP packets from a server. When it received a interested packet, it sends out a TCP packet back to the s... 5 C Programming, Verilog / VHDL, FPGA Aug 18, 2016 Aug 18, 2016Ended $5741
Write some Software Device: Solarflare AOE card (SFA7942Q) description link :http://www.solarflare.com/applicationonload-engine FPGA board: Altera Stratix V A7 Job description: Solarflare FDK provided a complete "Tick to trade" example. It only works on 1 10G port. The FPGA card will keep receiving UDP packets from a server. When it received a interested packet, it sends out a TCP packet back to the s... 2 Embedded Software, FPGA, Verilog / VHDL Aug 18, 2016 Aug 18, 2016Ended $10718
~~~~~need elecetronics and electrical exprt urgently~~~~~~-1 ~~~~~need elecetronics and electrical exprt urgently~~~~~~- 21 Engineering, Electronics, Verilog / VHDL, Electrical Engineering, Circuit Design Aug 18, 2016 Aug 18, 2016Ended $48
Desarrollar software Embedded Systems 7 PHP, C Programming, Verilog / VHDL, Software Architecture, Embedded Software Aug 17, 2016 Aug 17, 2016Ended $46
EtherCAT slave implement in VHDL/Verilog. 8 Electronics, Verilog / VHDL, Embedded Software Aug 17, 2016 Aug 17, 2016Ended $84
micro controller programming - open to bidding 27 Electronics, Verilog / VHDL, Microcontroller, Electrical Engineering, Circuit Design Aug 17, 2016 Aug 17, 2016Ended $48
VHDL Expert To be selected need to be ready for free test.Mention in first line 'I am ready for free test' And mention experience. Selected candidate will be given a major project for 6 months. 19 Verilog / VHDL Aug 10, 2016 Aug 10, 2016Ended $41
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