Verilog / VHDL jobs

I want to Hire I want to Work

Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Hire Verilog / VHDL Designers

51 jobs found, pricing in USD

Verification of Motion Estimator using Universal Verification Methodology (UVM) 6 days left

Motion Estimation is a process to determine the motion vectors that describe transformation one 2D image to another; usually from adjacent frames in the video sequence. To obtain motion estimation block matching algorithm is used. Usually, the only difference between much of content in subsequent frames is motion. The task is to detect blocks of video data from successive frames that are related only via translation. This project aims to verify the design to perform the full search of Motion Estimator using Universal Verification Methodology (UVM). UVM is based on library classes and is an open source verification methodology. It is used for functional verification of digital hardware, primarily using simulation. UVM uses an architecture to build the verification environment that enhances reuse-ability. The main purpose of this project is to 100% coverage.

Verilog / VHDL

$189 (Avg Bid)

$189 Avg Bid

2 bids

Bid now

JPEG2000 image compression in matlab 5 days left

JPEG2000 in matlab, image processing

Algorithm FPGA LabVIEW Matlab and Mathematica Verilog / VHDL

$33 (Avg Bid)

$33 Avg Bid

12 bids

Bid now

matlab image compression 5 days left

image compression using JPEG2000 in matlab

Algorithm FPGA LabVIEW Matlab and Mathematica Verilog / VHDL

$33 (Avg Bid)

$33 Avg Bid

10 bids

Bid now

FPGA implementation of a data structure 5 days left

We have decided to move a part of our software to FPGA to achieve lower latency. The incoming data (that will be provided to you) will update RAM in the FPGA . More info is available with a quick chat.

Verilog / VHDL

$465 (Avg Bid)

$465 Avg Bid

11 bids

Bid now

Real time 2-Dimensional FFT on FPGA using Verilog HDL 7h left

Please I wanna find some who can help me to finish this project as soon as possible, someone who is really expert with FPGA, Verilog HDL and Vivado.

Digital Design Electronics FPGA Programming Verilog / VHDL

$91 / hr (Avg Bid)

$91 / hr Avg Bid

20 bids

Bid now

i want to amibroker afl my own condition plz contact and help me 7004926136 Ended

dear sir i am shiv shankar pandit from ludhiana i have requeird my stratgy use in afl formula two zig-zig 1.----zig zag parameeter 0.1 to 5 2. ---position ----- both / only buy / only short / ALL Breakout 3. ---buy = first swing high breakout condition aply -- trade .01 point to 500 point after/ befor and if zig -zag 1 is up then i will take position sell on zig-zag low breakout 0.5 4. --- sell = first low breakout condition aply - trade .01 point to 500 poiont after / befor and if zig -zag 1 is down then i will take position buy on zig-zag high breakout 0.5 5. --target mathod --- none / % / point target 1-- 50 % / 100 % / point varry .01 - 5000 target 2 -- 50 % / 100 % point varry .01 - 5000 6. ---stoploss mathod - non / % / point 7. one clik -- show / hid buy -, exit buy - . short -, exit short show butun on the chart and position crent P/L SHOW ON the chart SEE BELOW ATTACHED FILE REGARD SHIV SHANDIT 7004926136 CALL ME FOR QUAIRY i want to USE this stratgy IN robo treade BACK TESTING IS MUST SHIV SHANKAR PANDIT FROME LUDHIANA-------------7004926136

Fortran Metatrader Verilog / VHDL Visual Basic

$69 (Avg Bid)

$69 Avg Bid

2 bids

Bid now

Business card + screen wallpaper + painting - open to bidding Ended

Dear all, we are hiring for a designer to design our : 1. business cards -> modern, simple, clear, clean 2. screen wallpaper painting to be used on our laptops and printed and hanged on our office walls -> with our logo and our core values: Excellence, Reliability, Efficiency Looking forward to your feedbacks. Logo attached here. Good luck

Algorithm PDF Technical Writing Verilog / VHDL Virtual Assistant

$100 (Avg Bid)

$100 Avg Bid

29 bids

Bid now

FPGA implementation of viola jones face detection algorithm for multiple face detection Ended

I need to implement a system which consists of display, OV7670 camera and zedboard(FPGA board) and should ble to detect multiple faces in input imsge.

Algorithm Image Processing Verilog / VHDL

$1931 (Avg Bid)

$1931 Avg Bid

4 bids

Bid now

Transistor modelling Ended

Project objectives : This research includes the development of the strong, robust transistor model which will best suitable for the microwave amplifier application. This model can be used to get some linear and nonlinear measurements, which consists of design, development and circuit analysis of HEMT based FET model and also states the experimental result of existing models. Using AWR microwave office tool

Verilog / VHDL Very-large-scale integration (VLSI)

$23 - $196

0 bids

Bid now

Design a 8-bit Ended

VHDL code design

Verilog / VHDL

$24 (Avg Bid)

$24 Avg Bid

22 bids

Bid now

Design a 8-bit MPZ using HDL description Ended

The conventional (single-match) priority encoder finds only one match, i.e. the highest priority input. An n-bit MPZ unit finds r (1 ≤ r ≤ n) matches in exactly r cycles. Design an 8-bitMPZ using HDL description. You may use ModelSim or Quartus II software. In your implementation, you may have a mix of behavioral and structural descriptions for modules/components. Slight modifications of the unit, compared to those provided in Section III are allowed. Your report for this problem should include the HDL code of your MPZ design and simulation results to show the correct behavior, or any other interesting observation (e.g. maximum clock frequency of the design).

Verilog / VHDL

$37 (Avg Bid)

$37 Avg Bid

8 bids

Bid now

flyhweel simulink model with AI controller Ended

Flywheel simulink model with AI control

FPGA Matlab and Mathematica Microcontroller Verilog / VHDL

$185 (Avg Bid)

$185 Avg Bid

22 bids

Bid now

ns2 project Ended

Develop and compare 2 methods. [url removed, login to view] trust value of each node by using watchdog method [url removed, login to view] contains different formula for trust calculation

Verilog / VHDL

$258 (Avg Bid)

$258 Avg Bid

3 bids

Bid now

Real-time pulse compression radar waveform generation and digital matched filtering Ended

I have added IEEE paper below. I need following three requirements. 1. project explanation. what is the plan to implement the paper. 2. Implement the paper in matlab. Need matlab simulations 3. Write a verilog code for the paper. Results has to match with matlab simulations.

Matlab and Mathematica Verilog / VHDL

$203 (Avg Bid)

$203 Avg Bid

7 bids

Bid now

networking ns2 Ended

ns2

Cloud Computing CUDA FPGA Verilog / VHDL

$636 (Avg Bid)

$636 Avg Bid

15 bids

Bid now

Private project or contest #15033122 Ended

Please Sign Up or Login to see details.

Electrical Engineering Electronics Engineering FPGA Verilog / VHDL

Bid now

Token Bucket in VHDL Ended

Details in chat, contact me for more if interested.

Verilog / VHDL

$25 (Avg Bid)

$25 Avg Bid

9 bids

Bid now

light to light conversion Ended

Pv fed led lighting system: Harmony search algorithm based controller design I am using altium nano board . i need verilog code for above algorithm.

Verilog / VHDL

$146 (Avg Bid)

$146 Avg Bid

5 bids

Bid now

Project for izafeirakis Ended

Hi izafeirakis, I noticed your profile and would like to offer you my project. We can discuss any details over chat.

Assembly PDF Technical Writing Verilog / VHDL Word

$82 (Avg Bid)

$82 Avg Bid

5 bids

Bid now

Project for fattouma92 Ended

Hi fattouma92, I noticed your profile and would like to offer you my project. We can discuss any details over chat.

Electronics FPGA Verilog / VHDL

$78 (Avg Bid)

$78 Avg Bid

1 bids

Bid now

Other jobs related to Verilog / VHDL

vhdl and verilog, verilog vhdl freelance, vhdl verilog fpga, online vhdl verilog project bid, asic vhdl verilog freelance, outsource asic vlsi fpga verilog vhdl, paid engineering projects vhdl verilog, vhdl verilog outsourcing, pci vhdl verilog, part time freelance vhdl verilog, convert verilog vhdl, vhdl verilog asic freelancing, spi fpga vhdl verilog, design framer vhdl verilog, verilog vhdl converter, translate verilog vhdl, latest vhdl verilog, lcd hd44780 verilog vhdl code, fpga vhdl verilog, w5300 verilog vhdl, convert vhdl verilog, perl convert verilog vhdl, conversion verilog vhdl, pci verilog vhdl, vhdl verilog freelance, design spi interface fpga verilog vhdl, vhdl verilog fsm, vhdl verilog asic vlsi fpga verification, verilog vhdl fpga, verilog vhdl perl,

Verilog / VHDL jobs

Filter

My recent searches

Filter by:

Budget

Skills

Languages

Job State

Other jobs related to Verilog / VHDL