For VLSI-CAD field, code in C required for technology mapping of a given complex circuit of LOGIC GATES.
We need to find the minimal cost cover of the given circuit using graph covering techniques(DAG) implemented by dynamic programming.
The project is required as a part of the research conducted in a MS program.
Please refer to word document "Technology mapping in VLSI" from attachments for more details.
There are three Phases for the project - I,II & III. Milestones will be based on the delivery of phases.
Code in C has to be delivered with a documentation of algorithms and methodology used separately.