ASIC Design & Verification Interview Panel required urgently

Bachelors in Engineering from a reputed institute with good academic record

Having 6+ years experience in ASIC design & verification

Good Knowledge on Tools like VMM, UVM, OVM, VERA Preferable SOC Verification.

ASIC design experience with RTL coding in Verilog/VHDL, FPGA experience, FPGA Board bring, FPGA synthesis

Skills: C Programming, Embedded Software, RTOS, Verilog / VHDL

See more: asic design verification interview, panel interview verification, verilog programming, panel interview, good interview, engineering interview, asic design, verilog rtl, programming fpga, vhdl, vhdl fpga, verilog vhdl, verification, uvm, synthesis, fpga vhdl, fpga verilog/vhdl, fpga / asic, design 6, interview programming, coding amp, coding academic, amp coding, years experience design verification interview, fpga design verilog

About the Employer:
( 0 reviews ) Bangalore, India

Project ID: #2693014

4 freelancers are bidding on average ₹750/hour for this job


Dear sir, I have more than 5 years experiance in digital design please check my profile

₹750 INR / hour
(26 Reviews)

Hi, I can do this for you. I have 14+ yrs of experience in the VLSI domain (Design, Verification, FPGA.. etc)... Plz get back to me so that we can discuss further..

₹750 INR / hour
(8 Reviews)

Hello Sir, I am a professional ASIC design and verification engineer.. Please check my personal message. -Salman

₹750 INR / hour
(1 Review)

Custom software development: w w w . The Administrator removed this message for containing contact details which breaches our Terms of Service . i o

₹750 INR / hour
(0 Reviews)