ASIC Design & Verification Interview Panel required urgently

Closed

Description

Bachelors in Engineering from a reputed institute with good academic record

Having 6+ years experience in ASIC design & verification

Good Knowledge on Tools like VMM, UVM, OVM, VERA Preferable SOC Verification.

ASIC design experience with RTL coding in Verilog/VHDL, FPGA experience, FPGA Board bring, FPGA synthesis

Skills: C Programming, Embedded Software, RTOS, Verilog / VHDL

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Project ID: #2693014

4 freelancers are bidding on average ₹750/hour for this job

ahmedmohamed85

Dear sir, I have more than 5 years experiance in digital design please check my profile

₹750 INR / hour
(26 Reviews)
5.7
iZoneFreelancer

Hi, I can do this for you. I have 14+ yrs of experience in the VLSI domain (Design, Verification, FPGA.. etc)... Plz get back to me so that we can discuss further..

₹750 INR / hour
(8 Reviews)
4.8
salmanh4772

Hello Sir, I am a professional ASIC design and verification engineer.. Please check my personal message. -Salman

₹750 INR / hour
(1 Review)
1.4
D6H8LnMw9

Custom software development: w w w . The Administrator removed this message for containing contact details which breaches our Terms of Service . i o

₹750 INR / hour
(0 Reviews)
0.0