Solve a bug on Verilog on NetFPGA board implementation (access to 2 NetFPGAs required)

In Progress

We need a Verilog expert to solve a bug on NetFPGA implementation of a modified Ethernet switch. It might be related with timing limitations of the Verilog code to gate conversion handling table writing and reading of MAC addresses at a table. More details on request.

GI

Skills: Electronics, Verilog / VHDL

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Project ID: #4244011

9 freelancers are bidding on average €26/hour for this job

ahmedmohamed85

Dear sir, I have more than 5 years experiance in FPGA programming

€36 EUR / hour
(21 Reviews)
5.5
MikroStar

hi, i am an electrical engineer and an embedded system designer.i can help you with this project.

€35 EUR / hour
(20 Reviews)
5.4
beandigital

Hi I may be able to assist you. Can you give me more details? Regards Jon Bean

€25 EUR / hour
(1 Review)
3.7
derif

Hi, I'm a Design and Verification Lead with Leading ASIC Verification IP development Company with around years of relevant experience. I've developed testbenches for Ethernet 10G in system Verilog using advance More

€25 EUR / hour
(1 Review)
3.0
iZoneFreelancer

Hi, I can do this for you. HIGH QUALITY guaranteed. More discussion on PM..

€36 EUR / hour
(2 Reviews)
2.6
JaySamarth

I can help you.

€20 EUR / hour
(0 Reviews)
0.0
alinayyar

Dear, I have more than 4 years experience in FPGA which includes my 2 years industrial experience. I can solve this bug in very less time. I have been optimizing my team codes for timing and area for last 1 year. More

€18 EUR / hour
(0 Reviews)
0.4
ExpertTech9

Hi Professional here.

€25 EUR / hour
(0 Reviews)
0.0
Expert321

Dear Client see your PM.

€20 EUR / hour
(0 Reviews)
0.0
kkkumaran

i am expert in verilog having one year experience in front-end designing.

€18 EUR / hour
(0 Reviews)
0.0