Field Programmable Gate Array Implementation of Reed-Solomon

This project received 5 bids from talented freelancers with an average bid price of ₹7160 INR.

Get free quotes for a project like this
Employer working
Skills Required
Project Budget
Total Bids
Project Description

Abstract—This paper demonstrates an FPGA implementation
of the Reed-Solomon, RS(255,239), codec architecture for the
OTN G.709. The RS codec is designed to occupy the least
amount of logic blocks, be fast and parameterizable. I am
presenting an efficient implementation of the encoder algorithm
on reconfigurable devices in addition to a non-finalized version
of the decoder. Both encoder and decoder are synthesized to
Altera’s StratixII and benchmarks are run against Altera’s Reed
Solomon Code. Xelic’s encoder is measured to be about half the
size of Altera’s encoder. Effort on optimizing Xelic’s decoder is
underway to have an efficient implementation of the decoder

Looking to make some money?

  • Set your budget and the timeframe
  • Outline your proposal
  • Get paid for your work

Hire Freelancers who also bid on this project

    • Forbes
    • The New York Times
    • Time
    • Wall Street Journal
    • Times Online