Mutiresolution Image Pyramid construction on FPGA

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I am working on the image processing cum fpga project. The title is Multiresolution Pyramid Construction on FPGA. Basically, its like storing an image(pixel values) in the fpga memory and displaying it on the vga monitor, this work is done and now i have to reduce the the size of the image and again store it back to the memory. Can I get any help regarding this?

Skills: Imaging, Verilog / VHDL

See more: fpga image pyramid, vhdl and verilog, vhdl fpga, verilog vhdl, image fpga, fpga vhdl, fpga verilog/vhdl, vhdl image processing, image verilog, vga vhdl, verilog vhdl fpga, fpga vhdl verilog, project vga, fpga project verilog, vga vhdl project, verilog image, verilog fpga image, vhdl project vga, verilog vga image, vhdl vga project, fpga image, image pixel, verilog vga, vga verilog, image pyramid

Project ID: #4477581

5 freelancers are bidding on average ₹12010 for this job

ahmedmohamed85

I can do it

₹23100 INR in 15 days
(26 Reviews)
5.7
jumbojack

HI, Please check the PMB. Thanks

₹11000 INR in 3 days
(2 Reviews)
1.3
idlywadasambar

hello madam , I would be a very greatful to work on this project. Please do consider my bid. With regards, Mani

₹13200 INR in 15 days
(0 Reviews)
0.0
WaleedElkholy

I will be glad to help you.

₹1750 INR in 5 days
(0 Reviews)
0.0
Sheikh0

Ma'am I can do it for you.

₹11000 INR in 5 days
(0 Reviews)
0.0