To create a "checker" in a Network Interface.
1. Checker will collect 32 bits data from 8 deserialisers. (eg A1 ~A8)
2. Checker will collect 32 bits data from 3 Collectors. (eg C1~C3)
3. Checker will then compare the data if it matches. (eg C1 = A1~A8?, C2 = A1~A8?, C3 = A1~A8?)
4. If data matches, Checker will release the data, (eg if C1 = A5 release data , if C2 = A1 release data, if C3 = None delete C3)
5. continue process.
I attached a picture and original source code for Network interface. "Checker " is to target on at the Receiver. Preferably using Xilinx.
My existing codes are in VHDL.