Completed

write an 8-bit CPU in VHDL

Awarded to:

vlsirajagopal

I have 7 yrs of experience in vhdl and verilog . I can do this very well without any bugs in design. I can write synthesizable vhdl RTL for it. Worked on fpga and asic verification as well.

$266 AUD in 3 days
(13 Reviews)
4.9

4 freelancers are bidding on average $197 for this job

$200 AUD in 3 days
(140 Reviews)
6.1
profvipabutaleb

I'm computer engineering TA with 10+ years of experience - experienced in VHDL - Verilog - MIPS - Constructing the whole microprocessor - structurally and behaviourly from scratch as RTL modules - synthesis the VHDL co More

$200 AUD in 3 days
(33 Reviews)
4.3
hajizafar541

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$120 AUD in 4 days
(6 Reviews)
3.3