In Progress

remove errors

this file compile with the vcs compiler but not in quartus, i really don't know why. can you help me with this problem? 30usd for removing the errors in 4 hours. thanks

Skills: Verilog / VHDL

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About the Employer:
( 0 reviews ) manila, Philippines

Project ID: #2509453

Awarded to:

iZoneFreelancer

Hired by the Employer

$30 USD in 1 day
(2 Reviews)
2.6