I have a lotof Verilog projects done (including some awarded on Freelancer.com), but your project is also interesting for me. Please contact me via chat to discuss technical details of your project implementation.
I am woking on FPGA/ASIC filed. My language in project is Verilog. I have some individual project as below:
- Design a DSP chip and demo on FPGA base datasheet of C2000 series from TI.
- Design a FPU core 32More
Your proposal looks really interesting for me because work on this area of technologies is good challenge. I like helping you to resolve your tasks and realise your decisions for improving business using webMore