10 year's experience in digital system design using VHDL and verilog for FPGA's and CPLD's both for Xilinx and Altera Chips.
I also have 10 years experience in working with Xilinx Ise form version 6.2 to 14.7 and Altera Quarus 2 for VHDL , verilog, system verilog and ip in addition to experience in Vivado design tool, and HLS and digital design using zynq7000
Very nice work. Ahmed did some Verilog programming for me, and he was very committed to a good final product. I'm also grateful for his patience and good communication. The job was tricky in many ways and he came up with some rather clever solutions to make the final product work well.
More than 5 years working in digital system design and Developing a complete VHDL Projects for Converting old digital systems based on TTL technology into small compact unites based on FPGA's.
Bachelor of Electronics Engineering
2002 - 2007
Certificate of merit
Thales Raytheon Systems
This Certificate has been awarded to me for the VHDL solutions that i had provided during the work in this project.
Rapid prototyping of MIMO-OFDM based on parity bit selected and permutation spreading
International Journal of Numerical Modelling: Electronic Networks, Devices and Fields
In this paper, a novel transmission scheme is developed to effectively combine permutation spreading technique with MIMO-OFDM to obtain improved bit error rate performance in the presence of frequency selective fading channels with low system complexity.
FPGA Implementation Platform for MIMO-OFDM Based on UART
Journal of Emerging Trends in Computing and Information Sciences
Most hardware designers use Simulink as a design platform because it contains many components that have hardware equivalent. In addition to that, it supports Matlab Co-simulation and hardware synthesis. Simulink is seen as a good platform for low complexity systems that do not require trimming analysis during the verification phase.
FPGA IMPLEMENTATION OF FLOATING-POINT COMPLEX MATRIX INVERSION BASED ON GAUSS-JORDAN ELIMINATION
Electrical and Computer Engineering (CCECE), 2013 26th Annual IEEE Canadian Conference
This work presents the architecture of an optimized complex matrix inversion using GAUSS-JORDAN elimination (
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