I consider myself a responsible, creative, with initiative and punctuality, I accept with pleasure the challenges and goals that your organization could assign me, with good handle of the interpersonal relationships, ability to work in teams, ability to work under high pressure, so as to solve problems efficiently and achieve the goals set by the company and to contribute in best possible way for the betterment of the organization and self.
I am currently doing professional certification on ASIC Physical Design. Here, We gain knowledge about the backend designing of the chip. The major step involved in the backend of chip designing like FP, Placement, STA, etc.
Jan 2018 - Present
I worked as a Memory layout Engineer. Having expertise in VLSI Domain.
Jul 2017 - Jan 2018 (6 months, 1 day)
I gain formal training on VLSI Domain with expertise in VLSI Layout design(Analog, Digital & Standard Cell).