Profile image of raulbehl
@raulbehl
Flag of India Bangalore, India
Member since February 22, 2015
8 Recommendations

raulbehl

Online Offline
I am currently working as a Design and Verification engineer at a leading Processor Development firm. My skills set include: i) Matlab/LabView/Logisim ii) Engineering Mathematics iii) Assembly (ARM, MIPS, PLP, x86, MARIE and pep/8) / Computer Architecture iv) Verilog/System Verilog/UVM v) Raspberry Pi/Arduino/TMS320C5535 eZdsp/TM4C123 vi) PSpice vii) C/C++, Qt, Python viii) Perl Happy to help! :-)
$25 USD/hr
144 reviews
6.4
  • 97%Jobs Completed
  • 97%On Budget
  • 99%On Time
  • 23%Repeat Hire Rate

Portfolio Items

Recent Reviews

  • image of Carl E. Design an FPGA ready CPU Tutorial $527.00 USD

    “Good work. Had no problems.”

  • image of Joseph S. Project for Rahul B. -- 2 $120.00 USD

    “Great job!”

  • image of Majid A. Project for Rahul B. $226.60 USD

    “As usual, Rahul delivered outstanding work. There was some miscommunication at first but everything was sorted out. Highly recommend.”

  • image of Joseph S. Writing Pipelined MIPs Simulator $55.00 USD

    “Performed outstanding work again. His code is very organized, efficient, and commented in detail. Thanks again Rahul!”

  • image of P J. Project for Rahul B. $120.00 AUD

    “Excellent, professional, and wonderful expert as well as a patient to provide quality work. I would really hire him for future projects.”

  • image of Hemil S. Build me a project in verilog or system verilog ₹12000.00 INR

    “Quality work submitted by Rahul within time. Would definitely recommend others and hire again in future.”

Experience

Open Source Hardware Developer

Nov 2016

SimpleCPU is a CPU design and verification platform with a bunch of design and verification tools under its hood. SimpleCPU is aimed towards students and researchers, helping them learn and easily carry out CPU simulations in an intuitive way. Developed a Verilog based MIPS CPU (covering both pipelined and non-pipelined ones) Developed C model for MIPS architecture and developed the SimpleCPU's very own co-simulation environment for functional testing Currently, working on RISC-V based CPUs

Open Source Developer

Oct 2015 - Mar 2016 (5 months)

Volunteer for the open source project Mixxx, a free DJ application for Windows, Mac, and Linux. Initially became familiar with codebase and QT and fixed few wishlists bugs.

Intern

Jul 2015 - Dec 2015 (5 months)

• Understand the basic work flow of the Memory Sub-system team and implement functional coverage model for external memory controller • Ported the random and directed tests to next product versions • Used SystemVerilog functional coverage extensions for specifying the coverage model • Found few corner cases in the testbench by analysing the coverage bins

Education

B.E. Hons Electronics and Instrumentation

2011 - 2015 (4 years)

Qualifications

edX Verified Certificate for Embedded Systems - Shape the World (2016)

edX UT.6.02x

Successfully completed and received a passing grade in UT.6.03x: Embedded Systems - Shape the World a course of study offered by UTAustinX, an online learning initiative of University of Texas System through edX.

Certifications

  • C 1
    87%
  • JavaScript Level 1
    87%
  • Preferred Freelancer Program SLA
    82%
  • US English Level 1
    80%
  • Python Level 1
    77%
  • Java Level 1
    75%

Verifications

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