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Flag of Argentina Buenos Aires, Argentina
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Member since March, 2013

Dedicated, result oriented professional with strong knowledge of technology. Research related to signal processing and FPGA and C programming / Linux / IPCs / sockets at Universidad Tecnologica Nacional Bs. As.

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@sfmaudet

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Top Skills

  • C Programming
  • Linux
  • Data Entry
  • Wireless
  • Engineering
  • Electronics
  • Android
  • Matlab & Mathematica
  • Verilog / VHDL
  • Scientific Research
  • Algorithm
  • Microcontroller
  • Electrical Engineering
  • Embedded Software
  • Academic Writing
  • Project Scheduling
  • PCB Layout
  • C++ Programming
  • Mathematics
  • UNIX
  • Imaging
  • Arduino
  • Linear Programming
  • Telecommunications Engineering
  • Physics
  • Spanish (Spain)
  • English (US)
  • Digital Design
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Recent Reviews

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Experience

IT Intership

Jan 2011 - Aug 2012 (1 year)

SAN Admin. Storage Admin. DMX3-950 - VMAX - BROCADE - UNIX HPUX.

R&D

Jan 2008

R&D related with : C programming - Matlab - Signal Processing - Assembly - Microcontrolers(ARM Cortex ) - VHDL (Xilinx)

Education

Electronics Eng.

2003 - 2013 (10 years)

Certifications

Symmetrix VMAX Administrator (2012)

Symmetrix VMAX Administrator

Publications

Implementación de un Kernel de Tiempo Real para Arquitectura ARMv7-M

La arquitectura ARMv7-M está presente en una gran variedad de microcontroladores modernos, principalmente implementada en los procesadores Cortex-M3 y Cortex-M4(F), y ha puesto al alcance del programador de sistemas embebidos características de hardware que hasta hace unos años estaban disponibles solamente en microprocesadores de alto rendimiento, orientados a computadoras personales y servidores con gran capacidad de cómputo. Al mismo tiempo, el comportamiento determinístico de esta arquitectura frente a

Wavelet Decomposition over FPGA

The application of Wavelet Decomposition in Digital Processing Signals field is increasing in the last years. In this work, an implementation of the Wavelet Decomposition over Xilinx Spartan6 FPGA, as a method for intensive Image Pro- cessing is presented. The main objective of our work is to take advantage of the hardware resources availables in a FPGA to improve the performance in the parallel precessing of several clusters of pixels, reaching a clear improve in time of satellite image processing

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