|ADAPTIVE MODULATION AND CODING USING MATLAB PROGRAMMING LANGUAGE
||ADAPTIVE MODULATION AND CODING
*Bandwidth =20 MHz;
*Number of FFT NFFT=64;
*Number of Data subcarrier Nd = 48;
*Number of pilot Np =4;
*Guard Interval = ¼ of symbol period Ts;
*OFDM transmission: 52 (i.e Nd+Np)
*Pilot data interval = 13 sub-carriers, starting from the 6th;
*Indices of the pilot sub-carier = 6th, 19th, 32nd and 45th sub-carrier;
* All mandatory and o...
||Engineering, Matlab and Mathematica, Algorithm, Electrical Engineering, LabVIEW
||Nov 17, 2017
||Nov 17, 20175d 8h
|FFT Processor In Matlab
||It is a project on FFT Processor In Matlab. I will give the details later.
||Matlab and Mathematica, Electronic Forms, Telecommunications Engineering
||Nov 10, 2017
||Nov 10, 2017Ended
|Python 3.5 Filtering function.
||I need help with two functions.
def post_process_image(self, image):
"""Post process the image to create a full contrast stretch of the image
takes as input:
image: the image obtained from the inverse fourier transform
return an image with full contrast stretch
1. Full ...
||Python, Matlab and Mathematica, Software Architecture, Machine Learning, C++ Programming
||Nov 2, 2017
||Nov 2, 2017Ended
|Develop a signal analysis algorithm
||Need an algorithm that imports acquired through St Jude Medical's Ensite Precison hardware (a medical 3d eletroanatomical platform used for the study of arrhythmias).
Data is organized in several files. Would need to import to matlab / python / stand alone platform:
- plot all the signals along time
- point clound, and then render it to a 3d surface, and show it
- import several time series (...
||C Programming, Matlab and Mathematica, Algorithm, C++ Programming
||Oct 29, 2017
||Oct 29, 2017Ended
||develop a firewall module
bsd install package
||Sep 23, 2017
||Sep 23, 2017Ended
|Real time 2-Dimensional FFT on FPGA using Verilog HDL
||Please I wanna find some who can help me to finish this project as soon as possible, someone who is really expert with FPGA, Verilog HDL and Vivado.
||Electronics, Verilog / VHDL, Digital Design, FPGA, Programming
||Sep 14, 2017
||Sep 14, 2017Ended