Implementation of EMAC 10/100Mbps local link block using Verilog

Hi I have 10+ Years in ASIC/FPGA Design and verification. I have two other junior assistants with me. we are capable to make IP's in Networking Domain and have a great experience with Ethernet Protocol/links. we are good in verilog and systemverilog stuff. Prior Ethernet Related Project 1) Ethernet Loop back ( Lattice FPGA) 2) Ethernet host controller ( IP) 3) Verification of Ethernet IP Waiting for your response. Thanks Shobhit Kapoor

dear i can do this project..if you are willing then contact me i will provide the quality work and deliver in time